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參數(shù)資料
| 型號： | 74C911 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 4-Digit Expandable Segment Display Controller |
| 中文描述： | 4位擴(kuò)展段顯示控制器 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 91K |
| 代理商： | 74C911 |
www.fairchildsemi.com
2
M
Truth Tables
Input Control
Output Control
R
=
Refresh (digit lines sequentially pulsed)
X
=
Don’t Care
Functional Description
The MM74C911 display controller is manufactured on stan-
dard metal gate CMOS technology. A single 5V 74 series
TTL supply can be used for power and should be bypassed
at the V
CC
pin to suppress current transients.
The digit outputs directly drive the base of a grounded
emitter digit transistor without the need of a Darlington con-
figuration. If an MM74C911 is driving a digit transistor and
also supplying digit information to a cascaded MM74C911,
base resistors are needed in the digit transistors to provide
an adequate high level to the digit inputs of the cascaded
MM74C911.
As seen in the Block Diagram, these display controllers
contain four 8-bit registers; any one may be randomly writ-
ten into. In normal operation, the internal multiplexer scans
the registers and refreshes the display. In cascaded opera-
tion, 1 MM74C911 serves as a master refresh device and
cascaded MM74C911’s are slaved to it through digit lines
operating as inputs.
The MM74C911 appears to a microprocessor as memory
and to the user as a self-scan display. Since every seg-
ment is under microprocessor control, great versatility is
obtained.
Low power standby operation occurs with both SOE and
DIO inputs HIGH. This condition forces the MM74C911 to a
quiescent state typically drawing less than 1
μ
A of supply
current with a standby supply voltage as low as 3V.
Logic Diagram
Digit
CE
Address
WE
Operation
K2
K1
0
0
0
0
Write Digit 1
0
0
0
1
Latch Digit 1
0
0
1
0
Write Digit 2
0
0
1
1
Latch Digit 2
0
1
0
0
Write Digit 3
0
1
0
1
Latch Digit 3
0
1
1
0
Write Digit 4
0
1
1
1
Latch Digit 4
1
X
X
X
Disable Writing
DIO
SOE
Digit Lines
Operation
D4 D3 D2 D1
0
0
R
R
R
R
Refresh Display
0
1
R
R
R
R
Disable Segment Outputs
1
0
0
0
0
0
Digits Are Now Inputs
1
0
0
0
0
1
Display Digit 1
1
0
0
0
1
0
Display Digit 2
1
0
0
1
0
0
Display Digit 3
1
0
1
0
0
0
Display Digit 4
1
1
0
0
0
0
Power Saver Mode
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| 74C925 | 4-Digit Counters with Multiplexed |
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| 74F1056 | 8-Bit Schottky Barrier Diode Array |
| 74F1056SC | 8-Bit Schottky Barrier Diode Array |
| 74F1056SCX | COMMON ANODE DIODE ARRAY|SO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74C911 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74C912 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74C922 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:16, 20-Key Encoder |
| 74C922N | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 74C923 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:16, 20-Key Encoder |
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