參數(shù)資料
型號(hào)： 74AVCM162834
廠商： NXP Semiconductors N.V.
英文描述： 18-bit registered driver with inverted register enable with 15Ω termination resistors (3-State)(帶15Ω終端電阻的具有反相寄存使能的18位寄存驅(qū)動(dòng)器（三態(tài)）)
中文描述： 18位與倒登記冊(cè)登記的司機(jī)能夠與15Ω終端電阻（3態(tài)）（帶15Ω終端電阻的具有反相寄存使能的18位寄存驅(qū)動(dòng)器（三態(tài)））
文件頁數(shù)： 7/10頁
文件大?。?/td> 89K
代理商： 74AVCM162834
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable with
15
termination resistors (3-State)
1999 Sep 14
7
AC WAVEFORMS FOR V
CC
= 3.0 V TO 3.6 V RANGE
V
M
= 0.5 V
V
X
= V
OL
+ 0.300 V
V
Y
= V
OH
– 0.300 V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
AC WAVEFORMS FOR V
CC
= 2.3 V TO 2.7 V AND
V
CC
< 2.3 V RANGE
V
M
= 0.5 V
CC
V
X
= V
OL
+ 0.15 V
V
Y
= V
– 0.15 V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
A
INPUT
t
PHL
t
PLH
V
OL
V
I
GND
V
OH
Y
OUTPUT
SH00132
V
M
V
M
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 1. Input (An) to output (Yn) propagation delay
LE INPUT
Yn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
V
M
V
M
V
M
SH00165
NOTE: V
M
= 0.5 V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
CP INPUT
Yn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
1/f
MAX
SH00135
V
M
V
M
V
M
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 3. The clock (CP) to Yn propagation delays, the
clock pulse width and the maximum clock frequency.
ééé
ééé
ééééééééé
ééééééééé
ééééééééé
An
INPUT
LE
INPUT
t
SU
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
t
SU
V
GND
V
I
GND
V
M
V
M
SH00166
Waveform 4. Data set-up and hold times for the An input to the
LE input
V
I
GND
éééé
éééé
éééé
ééééééé
ééééééé
ééééééé
An INPUT
V
I
GND
V
OH
Yn OUTPUT
V
OL
CP INPUT
t
su
t
su
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
SH00136
V
M
V
M
Waveform 5. Data set-up and hold times for the An input to the
clock CP input
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SH00137
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 6. 3-State enable and disable times
相關(guān)PDF資料
PDF描述
74AVCM162835 18-bit registered driver with 15Ω termination resistors (3-State)(帶15Ω終端電阻的18位寄存驅(qū)動(dòng)器（三態(tài)）)
74AVCM162836 20-bit registered driver with inverted register enable and 15 ohm termination resistors 3-State
74AVCM62836 20-bit registered driver with inverted register enable with 15Ω termination resistors (3-State)(帶15Ω終端電阻的具有反相寄存使能的20位寄存驅(qū)動(dòng)器（三態(tài)）)
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74AVCM162834DGG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit registered driver with inverted register enable and 15 ohm termination resistors 3-State
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