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參數(shù)資料
| 型號(hào)： | 74AUC1G00GW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Single 2-input NAND gate |
| 中文描述： | AUC SERIES, 2-INPUT NAND GATE, PDSO5 |
| 封裝： | PLASTIC, SOT-353, SC-88A, 5 PIN |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 50K |
| 代理商： | 74AUC1G00GW |
2002 Nov 12
4
Philips Semiconductors
Preliminary specification
Single 2-input NAND gate
74AUC1G00
handbook, halfpage
MNA098
2
4
&
1
Fig.3 IEE/IEC logic symbol.
handbook, halfpage
MNA099
B
A
Y
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1.
2.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
CC
=0 (Powered-down mode), the output voltage can be 2.7 V in normal operation.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
V
I
V
O
supply voltage
input voltage
output voltage
0.8
0
0
0
40
0
2.7
2.7
V
CC
2.7
+85
20
V
V
V
V
°
C
ns/V
active mode
V
CC
= 0 V; Power-down mode
T
amb
t
r
,t
f
(
t/
f)
operating ambient temperature
input rise and fall times
SYMBOL
PARAMETER
CONDITIONS
MIN.
0.5
0.5
0.5
MAX.
UNIT
V
CC
I
IK
V
I
I
OK
V
O
supply voltage
input diode current
input voltage
output diode current
output voltage
+3.6
50
+3.6
±
50
V
CC
+ 0.5
+3.6
±
60
±
100
+150
250
V
mA
V
mA
V
V
mA
mA
°
C
mW
V
I
< 0
note 1
V
O
> V
CC
or V
O
< 0
active mode; notes 1 and 2
Power-down mode; notes 1 and 2
0.5
V
O
= 0 to V
CC
I
O
I
CC
, I
GND
T
stg
P
D
output source or sink current
V
CC
or GND current
storage temperature
power dissipation per package
65
for temperature range from
40 to +85
°
C
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