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參數(shù)資料
| 型號： | 74ALVT162823 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 18-bit bus-interface D-type flip-flop with reset and enable with 30Ω termination resistors (3-State)(帶30 Ω終端電阻器的具有復(fù)位和使能的18位總線接口D觸發(fā)器（三態(tài)）) |
| 中文描述： | 18位總線接口D型觸發(fā)器的復(fù)位觸發(fā)器，能夠與30Ω終端電阻（3態(tài)）（帶30Ω終端電阻器的具有復(fù)位和使能的18位總線接口?觸發(fā)器（三態(tài)） ） |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 100K |
| 代理商： | 74ALVT162823 |
Philips Semiconductors
Product specification
74ALVT162823
2.5V/3.3V 18-bit bus-interface D-type flip-flop with reset
and enable with 30
termination resistors (3-State)
1998 Aug 27
9
AC WAVEFORMS
For all waveforms, V
M
= 1.5V or V
CC
/2 whichever is less
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
SH00017
nCP
nQn
V
M
t
w
t
PHL
V
M
t
PLH
1/f
MAX
V
M
3.0V or V
CC
whichever
is less
0V
0V
V
OH
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
nMR
V
M
nQn
t
w
V
M
t
PHL
V
M
nCP
SH00018
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
0V
V
OH
t
REC
Waveform 2. Master Reset Pulse WIdth, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
t
h
(H)
t
s
(H)
nCP
V
M
V
M
V
M
V
M
V
M
V
M
t
h
(L)
t
s
(L)
nDx,
nCE
SH00019
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
Waveform 3. Data Setup and Hold Times
V
OH
–0.3V
V
M
V
M
V
M
nQx
t
PZH
t
PHZ
nOE
0V
V
OH
SH00020
3.0V or V
CC
whichever
is less
0V
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
nOE
t
PZL
t
PLZ
V
OL
+0.3V
V
OL
nQx
SH00021
V
M
V
M
V
M
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVT162827 | 20-bit buffer/line driver, non-inverting,with 30Ω termination resistors (3-State)(同相（三態(tài)）,帶30 Ω終端電阻器的20位緩沖器/線驅(qū)動器) |
| 74ALVT16344 | 2.5V/3.3V 1-to-4 address driver 3-State |
| 74ALVT16344DL | 2.5V/3.3V 1-to-4 address driver 3-State |
| 74ALVT16344DGG | 2.5V/3.3V 1-to-4 address driver 3-State |
| 74ALVT16373 | 2.5V/3.3V 16-bit transparent D-type latch 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVT162823DG | 功能描述:觸發(fā)器 18-BIT BUS 35 W/30 OHM RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVT162823DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit bus-interface D-type flip-flop with reset and enable with 30ohm termination resistors (3-State) |
| 74ALVT162823DGG,11 | 功能描述:觸發(fā)器 18-BIT BUS 35 W/30 RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVT162823DGG,112 | 制造商:NXP Semiconductors 功能描述: |
| 74ALVT162823DGG,118 | 制造商:NXP Semiconductors 功能描述: |
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