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參數(shù)資料
| 型號： | 74ALVT162821 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30Ω termination resistors(3-State)(帶30 Ω終端電阻器2.5V/3.3V 20位總線接口上升沿觸發(fā)D觸發(fā)器（三態(tài)）) |
| 中文描述： | 2.5V/3.3V的20位總線接口D型觸發(fā)器，積極與30Ω終端電阻（3態(tài)）（帶30Ω終端電阻器2.5V/3.3V的20位總線接口上升沿觸發(fā)沿觸發(fā)?觸發(fā)器（三態(tài)）） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 97K |
| 代理商： | 74ALVT162821 |
Philips Semiconductors
Product specification
74ALVT162821
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30 termination resistors (3-State)
2
1998 Oct 02
853-2041 20127
FEATURES
Outputs include series resistance of 30 making external
termination resistors unnecessary
20-bit positive-edge triggered register
5V I/O Compatible
Multiple V
CC
and GND pins minimize switching noise
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Output capability
+
12mA/-12mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74ALVT162821 high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive. It is designed for V
CC
operation at 2.5V or 3.3V with I/O
compatibility to 5V.
The 74ALVT162821 has two 10-bit, edge triggered registers, with
each register coupled to a 3-State output buffer. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors.
The active Low Output Enable (nOE) controls all ten 3-State buffers
independent of the register operation. When nOE is Low, the data in
the register appears at the outputs. When nOE is High, the outputs
are in high impedance “off” state, which means they will neither drive
nor load the bus.
The 74ALVT162821 is designed with 30 series resistance in both
High and Low output stages. This design reduces the line noise in
applications such as memory address drivers, clock drivers and bus
receivers/transmitters. The series termination resistors reduce
overshoot and undershoot and are ideal for driving memory arrays.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C
TYPICAL
UNIT
2.5V
3.3V
t
PLH
t
PHL
Propagation delay
nCP to nQ
C
L
= 50pF
4.4
3.8
3.2
3.2
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3
3
pF
C
OUT
Output capacitance
V
O
= 0 or V
CC
9
9
pF
I
CCZ
Total supply current
Outputs disabled
40
70
μ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°
C to +85
°
C
74ALVT162821 DL
AV162821 DL
SOT371-1
56-Pin Plastic TSSOP Type II
–40
°
C to +85
°
C
74ALVT162821 DGG
AV162821 DGG
SOT364-1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVT162823 | 18-bit bus-interface D-type flip-flop with reset and enable with 30Ω termination resistors (3-State)(帶30 Ω終端電阻器的具有復(fù)位和使能的18位總線接口D觸發(fā)器（三態(tài)）) |
| 74ALVT162827 | 20-bit buffer/line driver, non-inverting,with 30Ω termination resistors (3-State)(同相（三態(tài)）,帶30 Ω終端電阻器的20位緩沖器/線驅(qū)動器) |
| 74ALVT16344 | 2.5V/3.3V 1-to-4 address driver 3-State |
| 74ALVT16344DL | 2.5V/3.3V 1-to-4 address driver 3-State |
| 74ALVT16344DGG | 2.5V/3.3V 1-to-4 address driver 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVT162821DG | 功能描述:觸發(fā)器 20-BIT BUS INTERFACE 3-STATE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVT162821DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State |
| 74ALVT162821DGG,11 | 功能描述:觸發(fā)器 20-BIT BUS INTERFACE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVT162821DGG,112 | 制造商:NXP Semiconductors 功能描述: |
| 74ALVT162821DGG,118 | 制造商:NXP Semiconductors 功能描述: |
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