參數(shù)資料
型號: 74ALVCH16841
廠商: NXP Semiconductors N.V.
英文描述: 20-bit bus interface D-type latch 3-State
中文描述: 20位總線接口,D型鎖存器三態(tài)
文件頁數(shù): 3/10頁
文件大小: 77K
代理商: 74ALVCH16841
Philips Semiconductors
Product specification
74ALVCH16841
20-bit bus interface D-type latch (3-State)
1998 Jul 27
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
1OE
Output enable inputs
(active-LOW)
Latch enable inputs
(active HIGH)
56
1LE
55, 54, 52, 51, 49,
48, 47, 45, 44, 43
2, 3, 5, 6, 8, 9, 10,
12, 13, 14
4, 11, 18, 25, 32,
39, 46, 53
1D0 – 1D9
Data inputs
1Q0 – 1Q9
Data outputs
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply
voltage
Output enable inputs
(active-LOW)
Latch enable inputs
(active HIGH)
28
2OE
29
2LE
42, 41, 40, 38, 37,
36, 34, 33, 31, 30
15, 16, 17, 19, 20,
21, 23, 24, 26, 27
2D0 – 2D9
Data inputs
2Q0 – 2Q9
Data outputs
FUNCTION TABLE
INPUTS
OUTPUT
nOE
LE
Dx
Q
L
H
L
L
L
H
H
H
L
L
X
Q
0
Z
H
X
X
H =
L
X =
Z =
High voltage level
Low voltage level
Don’t care
High impedance “off” state
=
LOGIC SYMBOL
1D0 1D1 1D2 1D3 1D4 1D5 1D6
1D7
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6
1Q7
1D8
1D9
1Q8
1Q9
2D0 2D1 2D2 2D3 2D4 2D5 2D6
2D7
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6
2Q7
2D8
2D9
2Q8
2Q9
55
54
52
51
49
48
47
45
44
43
56
1
29
28
2
3
5
6
8
9
10
12
13
14
42
41
40
38
37
36
34
33
31
30
15
16
17
19
20
21
23
24
26
27
SH00023
1LE
1OE
2LE
2OE
LOGIC SYMBOL (IEEE/IEC)
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1D8
1D9
1Q8
1Q9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2D8
2D9
2Q8
2Q9
EN4
2
EN2
4
1
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
2
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
27
1D
3D
C1
C3
1OE
1LE
2OE
2LE
SH00152
LOGIC DIAGRAM
nD
0
nQ
0
D
LE
nLE
nOE
SH00151
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