參數(shù)資料
型號: 74ALVCH16821
廠商: NXP Semiconductors N.V.
英文描述: Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 85
中文描述: 20位總線接口D型觸發(fā)器;積極邊緣觸發(fā)三態(tài)
文件頁數(shù): 5/12頁
文件大?。?/td> 95K
代理商: 74ALVCH16821
Philips Semiconductors
Product specification
74ALVCH16821
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 May 29
5
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
MIN
MAX
V
CC
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
2.7
V
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
3.0
3.6
V
I
DC Input voltage range
0
V
CC
V
V
O
DC output voltage range
0
V
CC
V
T
amb
Operating free-air temperature range
–40
+85
°
C
t
r
, t
f
Input rise and fall times
V
CC
= 2.3 to 3.0V
V
CC
= 3.0 to 3.6V
0
0
20
10
ns/V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
I
IK
DC supply voltage
–0.5 to +4.6
V
DC input diode current
V
I
For control pins
1
0
–50
mA
V
I
DC input voltage
DC in ut voltage
–0.5 to +4.6
V
For data inputs
1
–0.5 to V
CC
+0.5
50
I
OK
V
O
I
O
DC output diode current
V
O
Note 1
V
CC
or V
O
0
mA
DC output voltage
–0.5 to V
CC
+0.5
50
V
DC output source or sink current
V
O
= 0 to V
CC
mA
I
GND
, I
CC
T
stg
DC V
CC
or GND current
Storage temperature range
100
mA
–65 to +150
°
C
P
TOT
Power dissipation per package
–plastic medium-shrink (SSOP)
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125
°
C
above +55
°
C derate linearly with 11.3 mW/K
above +55
°
C derate linearly with 8 mW/K
850
600
mW
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
相關(guān)PDF資料
PDF描述
74ALVCH16823 Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125
74ALVCH16825 Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 125
74ALVCH16827 20-bit buffer/line driver, non-inverting 3-State
74ALVCH16841DL 20-bit bus interface D-type latch (3-State)
74ALVCH16841 20-bit bus interface D-type latch 3-State
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