參數(shù)資料
型號: 74ALVCH16623DGG
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 16-bit transceiver with dual enable; 3-state
中文描述: ALVC/VCX/A SERIES, 16-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: PLASTIC, SOT-362, TSSOP-48
文件頁數(shù): 2/16頁
文件大?。?/td> 84K
代理商: 74ALVCH16623DGG
1999 Sep 20
2
Philips Semiconductors
Product specification
16-bit transceiver with dual enable; 3-state
74ALVCH16623
FEATURES
Complies with JEDEC standard
no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
MULTIBYTE
flow-through
standard pin-out architecture
All data inputs have bus hold
circuitry
Output drive capability 50
transmission lines at 85
°
C
Current drive
±
24 mA at 3.0 V.
DESCRIPTION
The 74ALVCH16623 is a high-performance, low-power, low-voltage, Si-gate
CMOS device, superior to most advanced CMOS compatible TTL families.
The 74ALVCH16623 is a 16-bit transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions.
This 16-bit bus transceiver is designed for asynchronous two-way
communication between data buses. The control function implementation
allows maximum flexibility in timing. This device allows data transmission from
the A bus to the B bus or from the B bus to the A bus, depending upon the logic
levels at the enable inputs (nOE
AB
, nOE
BA
). The enable inputs can be used to
disable the device so that the buses are effectively isolated. The dual enable
function configuration gives this transceiver the capability to store data by
simultaneous enabling of nOE
AB
and nOE
BA
. Each output reinforces its input in
this transceiver configuration. Thus, when all control inputs are enabled and all
other data sources to the four sets of the bus lines are at high-impedance
OFF-state, all sets of bus lines will remain at their last states. The 8-bit codes
appearing on the two double sets of buses will be complementary. This device
can be used as two 8-bit transceivers or one 16-bit transceiver.
To ensure the high-impedance state during power-on or power-down, OE
BA
shouldbetiedtoV
CC
throughapull-upresistor andOE
AB
shouldbetiedtoGND
through a pull-down resistor; the minimum value of the resistor is determined
by the current-sinking/current-sourcing capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a
valid logic level.
QUICK REFERENCE DATA
Ground = 0; T
amb
= 25
°
C; t
r
= t
f
= 2.5 ns.
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
C
L
= output load capacitance in pF;
f
o
= output frequency in MHz;
V
CC
= supply voltage in Volts;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
The condition is V
I
= GND to V
CC
.
2.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
propagation delay nA
n
, nB
n
to nB
n
, nA
n
C
L
= 30 pF; V
CC
= 2.5 V
C
L
= 50 pF; V
CC
= 3.3 V
2.0
1.9
10.0
3.0
ns
ns
pF
pF
C
I/O
C
I
C
PD
input/output capacitance
input capacitance
power dissipation capacitance per buffer notes 1 and 2
outputs enabled
outputs disabled
35
5
pF
pF
相關(guān)PDF資料
PDF描述
74ALVCH16623 16-bit transceiver with dual enable; 3-state
74ALVCH16646 Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 85
74ALVCH16652 16-bit transceiver/register with dual enable; 3-state
74ALVCH16821 Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 85
74ALVCH16823 Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74ALVCH16623DGG,51 功能描述:總線收發(fā)器 16-BIT XCVR NON-INVER, 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ALVCH16623DL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 8-bit Bus Transceiver
74ALVCH16623DL,112 功能描述:IC 16BIT TXRX 3-ST 48SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器,驅(qū)動器,接收器,收發(fā)器 系列:74ALVCH 標準包裝:1,000 系列:74ABT 邏輯類型:寄存收發(fā)器,非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高,低:32mA,64mA 電源電壓:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR)
74ALVCH16623DL,118 功能描述:總線收發(fā)器 3.3V 16 XCVR DUAL ENBL NINV BH RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel