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參數(shù)資料
| 型號： | 74ALVCH162827 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 20-bit buffer/line driver, non-inverting,with 30Ω termination resistor (3-State)(同相,帶30Ω終端電阻器的20位緩沖器/線驅(qū)動器（三態(tài)）) |
| 中文描述： | 20位緩沖器/線路驅(qū)動器，不翻30Ω端接電阻，（3態(tài)）（同相，帶30Ω終端電阻器的20位緩沖器/線驅(qū)動器（三態(tài)）） |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 72K |
| 代理商： | 74ALVCH162827 |
Philips Semiconductors
Product specification
74ALVCH162827
20-bit buffer/line driver, non-inverting, with 30
termination resistors (3-State)
2
1998 Sep 29
853-2127 20100
FEATURES
Complies with JEDEC standard no. 8-1A.
CMOS low power consumption
Direct interface with TTL levels
Current drive
±
12 mA at 3.0 V
MULTIBYTE
TM
flow-through standard pin-out architecture
Low inductance multiple V
CC
and GND pins for minimum noise
and ground bounce
Integrated 30 termination resistors
DESCRIPTION
The 74ALVCH162827 high-performance CMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
The 74ALVCH162827 20-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NAND Output Enables (nOE1, nOE2) for
maximum control flexibility.
The 74ALVCH162827 is designed with 30
series resistance in both
the pull-up and pull-down output structures. This design reduces line
noise in applications such as memory address drivers, clock drivers
and bus receivers/transmitters.
To ensure the high impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
= t
f
= 2.5ns
SYMBOL
Propagation delay
nAn to nYn
C
I
Input capacitance
PARAMETER
CONDITIONS
TYPICAL
2.9
2.9
5
14
3
UNIT
t
PHL
/t
PLH
V
CC
= 2.5V, C
L
= 30pF
V
CC
= 3.3V, C
L
= 50pF
ns
pF
C
PD
Power dissipation capacitance per latch
Power dissi ation ca acitance er latch
V
I
= GND to V
CC1
Output enabled
Output disabled
pF
NOTES:
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
= C
PD
×
V
CC2
×
f
i
+ (C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic TSSOP Type II
–40
°
C to +85
°
C
74ALVCH162827DGG
ACH162827DGG
SOT364-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
1A0 - 1A9
2A0 - 2A9
Data inputs
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1Y0 - 1Y9
2Y0 - 2Y9
Data outputs
1, 56,
28, 29
1OE1 1OE2,
2OE1, 2OE2
Output enable inputs (active-LOW)
4, 11, 18, 25, 32, 39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply voltage
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVCH162827DG | 功能描述:緩沖器和線路驅(qū)動器 20 BIT BUF/DVR 3-S RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74ALVCH162827DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State) |
| 74ALVCH162827DGG,1 | 功能描述:緩沖器和線路驅(qū)動器 20BIT BUF/DVR 3-S RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74ALVCH162827DGG,112 | 制造商:NXP Semiconductors 功能描述: |
| 74ALVCH162827DGG,118 | 制造商:NXP Semiconductors 功能描述: |
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