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參數(shù)資料
| 型號： | 74ALVC16374 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Triple 3-Input Positive-AND Gates 14-SOIC -40 to 85 |
| 中文描述： | 低電壓16位D類觸發(fā)器，在3.6V耐壓輸入和輸出拖鞋 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 122K |
| 代理商： | 74ALVC16374 |
2005 Fairchild Semiconductor Corporation
DS500692
www.fairchildsemi.com
October 2001
Revised May 2005
7
74ALVC16374
Low Voltage 16-Bit D-Type Flip-Flop
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The 74ALVC16374 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V - 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
3.5 ns max for 3.0V to 3.6V V
CC
4.4 ns max for 2.3V to 2.7V V
CC
7.8 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
!
2000V
Machine model
!
200V
I
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2:
BGA package available in Tape and Reel only.
Note 3:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Order Number
74ALVC16374GX
(Note 2)
74ALVC16374MTD
(Note 3)
Package Number
BGA54A
Package Descriptions
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
MTD48
相關PDF資料 |
PDF描述 |
|---|---|
| 74ALVC16374MTD | Triple 3-Input Positive-AND Gates 14-SOIC -40 to 85 |
| 74ALVC16374GX | Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs |
| 74ALVC16500 | Triple 3-Input Positive-AND Gates 14-PDIP -40 to 85 |
| 74ALVC16500MTDX | 18-Bit Bus Transceiver |
| 74ALVC16500MTD | Triple 3-Input Positive-AND Gates 14-SO -40 to 85 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC16374/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3 V 16 Bit D-Type Flip-Flop |
| 74ALVC16374DGG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit D-Type Flip-Flop |
| 74ALVC16374DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit D-Type Flip-Flop |
| 74ALVC16374DT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74ALVC16374DTR | 功能描述:IC FLIP-FLOP 16BIT DTYPE 48TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 觸發(fā)器 系列:74ALVC 產(chǎn)品變化通告:Product Discontinuation 27/Jan/2012 標準包裝:2,000 系列:74LCX 功能:標準 類型:D 型總線 輸出類型:三態(tài)非反相 元件數(shù):1 每個元件的位元數(shù):8 頻率 - 時鐘:150MHz 延遲時間 - 傳輸:1.5ns 觸發(fā)器類型:正邊沿 輸出電流高，低:24mA，24mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.209"，5.30mm 寬） 包裝:帶卷 (TR) 其它名稱:MC74LCX574MELG-NDMC74LCX574MELGOSTR |
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