參數(shù)資料
型號: 74ALS648-1N
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Transceiver/register
中文描述: ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24
封裝: 0.300 INCH, PLASTIC, DIP-24
文件頁數(shù): 9/13頁
文件大?。?/td> 155K
代理商: 74ALS648-1N
Philips Semiconductors
Product specification
74ALS646/74ALS646-1
74ALS648/74ALS648-1
Transceiver/register
1991 Feb 08
9
AC WAVEFORMS
For all waveforms, V
M
= 1.3V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
CPBA
or
CPAB
V
M
V
M
V
M
t
w
(H)
1/f
max
V
M
V
M
t
PLH
t
w
(L)
t
PHL
An or Bn
SF00394
Waveform 1.
Clock Pulse Width, and Maximum Clock Frequency
Propagation Delay for Clock Input to Output,
SF00395
V
M
V
M
V
M
V
M
Bn or An
An or Bn
t
PLH
t
PHL
SBA or SAB
An or Bn
Waveform 2.
Propagation Delay for An to Bn or Bn to An
and SAB or SBA to An or Bn
V
M
V
M
V
M
V
M
t
PHL
t
PLH
An or Bn
Bn or An
SBA or SAB
An or Bn
SF00396
Waveform 3.
Propagation Delay for An to Bn or Bn to An
and SAB or SBA to An or Bn
V
M
V
M
V
M
V
M
V
M
V
M
t
su
(L)
t
h
(L)
t
su
(H)
t
h
(H)
An or Bn
CPBA
or
CPAB
SF00397
Waveform 4.
Data Setup Time and Hold Times
V
M
V
M
V
M
t
PHZ
t
PZH
OE
V
OH
-0.3V
0V
An or Bn
DIR
SF00398
Waveform 5.
3-State Output Enable Time to High Level
and Output Disable Time from High Level
V
M
V
M
V
M
t
PLZ
t
PZL
V
OL
+0.3V
3.5V
OE
DIR
An or Bn
SF00399
Waveform 6.
3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
相關(guān)PDF資料
PDF描述
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