- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360412 > 74ALS564A (NXP Semiconductors N.V.) Octal D flip-flop, inverting (3-State)(八D觸發(fā)器，反相（三態(tài)）) PDF資料下載
參數(shù)資料
| 型號： | 74ALS564A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal D flip-flop, inverting (3-State)(八D觸發(fā)器，反相（三態(tài)）) |
| 中文描述： | 八路D觸發(fā)器，反相（3態(tài)）（八?觸發(fā)器，反相（三態(tài)）） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 134K |
| 代理商： | 74ALS564A |
Philips Semiconductors
Product specification
74ALS563A/74ALS564A
Latch/flip-flop
74ALS563A
74ALS564A
Octal transparent latch, inverting (3-State)
Octal D flip-flop, inverting (3-State)
2
1996 Jul 01
853–1306 01670
FEATURES
74ALS563A is broadside pinout and inverting version of
74ALS373
74ALS564A is broadside pinout and inverting version of
74ALS374
Inputs and outputs on opposite side of package allow easy
interface to microprocessors
Useful as an input or output port for microprocessors
3-State outputs for bus interfacing
Common output enable
74ALS573A and 74ALS574A are non-inverting version of
74ALS563B and 74ALS564A respectively
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74ALS563A
6.0ns
12mA
74ALS564A
6.0ns
15mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
DRAWING
NUMBER
20-pin plastic DIP
74ALS563AN, 74ALS564AN
SOT146-1
20-pin plastic SOL
74ALS563AD, 74ALS564AD
SOT163-1
DESCRIPTION
The 74ALS563A is an octal transparent latch coupled to eight
3-State output devices. The two sections of the device are controlled
independently by enable (E) and output enable (OE) control gates.
The 74ALS563A is a complementary version of the 74ALS373 and
has a broadside pinout configuration to facilitate PC board layout
and allow easy interface with microprocessors.
The data on the D inputs is transferred to the latch outputs when the
enable (E) input is High. The latch remains transparent to the data
input while E is High, and stores the inverted data that is present
one setup time before the High-to-Low enable transition.
The 74ALS564A is a complementary version of the 74ALS373 and
has a broadside pinout configuration to facilitate PC board layout
and allow easy interface with microprocessors.
It is an 8-bit edge triggered register coupled to eight 3-State output
buffers. The two sections of the device are controlled independently
by clock (CP) and output enable (OE) control gates.
The register is fully edge triggered. The state of the D input, one
setup time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q output.
The active-Low output enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is Low, latched or
transparent data appears at the output.
When OE is High, the outputs are in high impedance “off” state,
which means they will neither drive nor load the bus.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D7
Data inputs
1.0/2.0
20
μ
A/0.2mA
20
μ
A/0.1mA
20
μ
A/0.1mA
20
μ
A/0.2mA
E (74ALS563A)
Enable input
1.0/1.0
OE
Output enable input (active-Low)
1.0/1.0
CP (74ALS564A)
Clock pulse input (active rising edge)
1.0/2.0
Q0 – Q7
One (1.0) ALS unit load is defined as: 20
μ
A in the High state and 0.1mA in the Low state.
Data outputs
130/240
2.6mA/24mA
NOTE:
相關PDF資料 |
PDF描述 |
|---|---|
| 74ALS563AN | Latch flip/flop |
| 74ALS564AD | Latch flip/flop |
| 74ALS564AN | Latch flip/flop |
| 74ALS573B | Latch flip-flop |
| 74ALS573BD | Latch flip-flop |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALS564AD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip/flop |
| 74ALS564AN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip/flop |
| 74ALS573 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| 74ALS573B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip-flop |
| 74ALS573BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip-flop |
發(fā)布緊急采購，3分鐘左右您將得到回復。