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參數(shù)資料
| 型號： | 74ALS273DB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal D-type flip-flop |
| 中文描述： | ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | PLASTIC, SSOP2-20 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 114K |
| 代理商： | 74ALS273DB |
Philips Semiconductors
Product specification
74ALS273
Octal D-type flip-flop
1991 Feb 08
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
MIN
TYP
2
MAX
V
OH
High level output voltage
High-level output voltage
V
±
10%, V
= MAX,
CC
V
IH
= MIN
I
OH
= –0.4mA
I
OH
= MAX
I
OL
= 12mA
I
OL
= 24mA
V
CC
– 2
2.4
V
IL
3.2
V
V
OL
Low level output voltage
Low-level output voltage
V
= MIN, V
= MAX,
CC
V
IH
= MIN
0.25
0.40
V
IL
0.35
0.50
V
V
IK
I
I
I
IH
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
–0.73
–1.5
V
Input current at maximum input voltage
0.1
mA
High-level input current
20
μ
A
I
IL
Low level input current
Low-level input current
MR, CP
V
CC
= MAX V = 0 4V
I
= 0.4V
–0.1
mA
Dn
–0.2
mA
I
O
Output current
3
V
CC
= MAX, V
O
= 2.25V
–30
–112
mA
I
CC
Supply current (total)
I
CCH
I
CCL
V
CC
= MAX
12
18
mA
21
29
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
= 5V, T
= 25
°
C.
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
OS
.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
UNIT
MIN
MAX
f
MAX
t
PLH
t
PHL
Maximum clock frequency
Waveform 1
65
MHz
Propagation delay
CP to Qn
Waveform 1
2.0
3.0
8.0
11.0
ns
t
PHL
Propagation delay
MR to Qn
Waveform 2
4.0
12.0
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
UNIT
MIN
MAX
t
su
(H)
t
su
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
t
w
(L)
Setup time, High or Low
Dn to CP
Waveform 3
5.0
5.0
ns
Hold time, High or Low
Dn to CP
Waveform 3
0.0
0.0
ns
CP pulse width,
High or Low
Waveform 1
6.0
8.0
ns
MR pulse width, Low
Waveform 2
7.0
ns
t
REC
Recovery time,
MR to CP
Waveform 2
12.0
ns
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