參數(shù)資料
型號: 74ACTQ823SPC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Quiet Seriesa⑩ 9-Bit D-Type Flip-Flop with 3-STATE Outputs
中文描述: ACT SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDIP24
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-24
文件頁數(shù): 1/7頁
文件大小: 75K
代理商: 74ACTQ823SPC
May 1991
Revised December 1998
7
1999 Fairchild Semiconductor Corporation
DS010921.prf
www.fairchildsemi.com
74ACTQ823
Quiet Series
9-Bit D-Type Flip-Flop
with 3-STATE Outputs
General Description
The ACTQ823 is a 9-bit buffered register. It features Clock
Enable and Clear which are ideal for parity bus interfacing
in high performance microprogramming systems. The
ACTQ823 utilizes Fairchild Quiet Series
technology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series
features
GTO
output control and undershoot corrector in addition
to a split ground bus for superior performance.
Features
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
I
Guaranteed pin-to-pin skew AC performance
I
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
I
Improved latch-up immunity
I
Has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Assignment
for DIP and SOIC
Pin Descriptions
FACT
, Quiet Series
, FACT Quiet Series
and GTO
are trademarks of Fairchild Semiconductor Corporation.
Order Number
74ACTQ823SC
74ACTQ823SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
Pin Names
D
0
–D
8
O
0
–O
8
OE
Description
Data Inputs
Data Outputs
Output Enable
CLR
CP
Clear
Clock Input
EN
Clock Enable
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