參數(shù)資料
型號(hào)： 74ACTQ657SPC
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 通用總線功能
英文描述： 18-Bit LVTTL-to-GTLP Bus Transceiver with Source Synchronous Clock Outputs 56-TVSOP -40 to 85
中文描述： ACT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDIP24
封裝： 0.300 INCH, SLIM, PLASTIC, MS-001, DIP-24
文件頁數(shù)： 7/10頁
文件大?。?/td> 96K
代理商： 74ACTQ657SPC
7
www.fairchildsemi.com
7
AC Electrical Characteristics for ACTQ
Note 16:
Voltage Range 5.0 is 5.0V
±
0.5V
Note 17:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by
design. Not tested.
Note 18:
These delay times reflect the 3-STATE recovery time only and not the signal time through the buffers or the parity check circuitry. To assure VALID
information at the ERROR pin, time must be allowed for the signal to propagate through the drivers (B to A), through the parity check circuitry (same as A to
PARITY), and to the ERROR output after the ERROR pin has been enabled (Output Enable times). VALID data at the ERROR pin
≥
(A to PARITY)
+
(Output
Enable Time).
Capacitance
V
CC
T
A
=
25
°
C
C
L
=
50 pF
Typ
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Min
Symbol
Parameter
(V)
Units
(Note 16)
Min
Max
Max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
,
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
t
OSLH
Propagation Delay
A
n
to B
n
, B
n
to A
n
Propagation Delay
A
n
to Parity
Propagation Delay
5.0
1.5
5.0
8.0
1.5
8.5
ns
5.0
2.5
7.5
11.0
2.5
11.5
ns
5.0
2.5
6.5
10.5
2.5
11.0
ns
ODD/EVEN to PARITY
Propagation Delay
ODD/EVEN to ERROR
5.0
2.5
6.5
10.5
2.5
11.0
ns
Propagation Delay
B
n
to ERROR
Propagation Delay
5.0
3.0
7.5
11.0
3.0
11.5
ns
5.0
2.0
6.0
9.5
2.0
10.0
ns
PARITY to ERROR
Output Enable Time
OE to A
n
/B
n
Output Disable Time
OE to A
n
/B
n
Output Enable Time
5.0
2.0
6.0
9.5
2.0
10.0
ns
5.0
1.0
5.0
9.0
1.0
9.5
ns
5.0
2.0
6.0
9.5
2.0
10.0
ns
OE to ERROR (Note 18)
Output Disable Time
OE to ERROR
5.0
1.0
6.0
9.0
1.0
9.5
ns
Output Enable Time
OE to PARITY
Output Disable Time
5.0
2.0
6.0
9.5
2.0
10.0
ns
5.0
1.0
5.0
9.0
1.0
9.5
ns
OE to PARITY
Output to Output Skew
5.0
0.5
1.0
1.0
ns
A
n
, B
n
to B
n
, A
n
(Note 17)
Symbol
Parameter
Typ
4.5
Units
pF
Conditions
C
IN
C
PD
Input Capacitance
V
CC
=
5.0V
V
CC
=
5.0
Power Dissipation Capacitance
160.0
pF
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74ACTQ74PC 功能描述:觸發(fā)器 Dl D-Type Flip-Flop DL D W/ PRESET/CLEAR RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ACTQ74PC_Q 功能描述:觸發(fā)器 Dl D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ACTQ74SC 功能描述:觸發(fā)器 Dl D-Type Flip-Flop DL D W/ PRESET/CLEAR RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ACTQ74SC_Q 功能描述:觸發(fā)器 Dl D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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