參數(shù)資料
型號(hào): 74ACT715PC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 消費(fèi)家電
英文描述: Programmable Video Sync Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP20
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-20
文件頁(yè)數(shù): 8/14頁(yè)
文件大?。?/td> 127K
代理商: 74ACT715PC
www.fairchildsemi.com
8
7
RS170 Default Register Values
The tables below show the values programmed for the
RS170 Format (using a 14.31818 MHz clock signal) and
how they compare against the actual EIA RS170 Specifica-
tions. The default signals that will be output are CSYNC,
CBLANK, HDRIVE and VDRIVE. The device initially starts
at the beginning of the odd field of interlace. All signals
have active low pulses and the clock is disabled at power
up. Registers 13 and 14 are not involved in the actual sig-
nal information. If the Vertical Interrupt was selected so that
a pulse indicating the active lines would be output.
RS170 Horizontal Data
Reg
REG0
REG0
REG1
REG2
REG3
REG4
REG5
REG6
REG7
REG8
REG9
REG10
REG11
REG12
REG13
REG14
REG15
REG16
REG17
REG18
D Value H
0
1024 400 Status Register (715-R)
23
017 HFP End Time
91
05B HSYNC Pulse End Time
157
09D HBLANK Pulse End Time
910
38E Total Horizontal Clocks
7
007 VFP End Time
13
00D VSYNC Pulse End Time
41
029 VBLANK Pulse End Time
525
20D Total Vertical Lines
57
039 Equalization Pulse End Time
410
19A Serration Pulse Start Time
1
001 Pulse Interval Start Time
19
013 Pulse Interval End Time
41
029 Vertical Interrupt Activate Time
526
20E Vertical Interrupt Deactivate Time
911
38F Horizontal Drive Start Time
92
05C Horizontal Drive End Time
1
001 Vertical Drive Start Time
21
015 Vertical Drive End Time
Register Description
000 Status Register (715)
Rate
Period
Input Clock
Line Rate
Field Rate
Frame Rate
14.31818 MHz
15.73426 kHz
59.94 Hz
29.97 Hz
69.841 ns
63.556
μ
s
16.683 ms
33.367 ms
Signal
HFP
Width
22 Clocks
68 Clocks
156 Clocks
91 Clocks
34 Clocks
68 Clocks
910 Clocks
μ
s
%H
Specification (
μ
s)
1.5
±
0.1
4.7
±
0.1
10.9
±
0.2
0.1H
±
0.005H
2.3
±
0.1
4.7
±
0.1
1.536
4.749
10.895
6.356
2.375
4.749
63.556
HSYNC Width
HBLANK Width
HDRIVE Width
HEQP Width
HSERR Width
HPER iod
RS170 Vertical Data
VFP
VSYNC Width
VBLANK Width
VDRIVE Width
VEQP Intrvl
VPERiod (field)
VPERiod (frame)
7.47
17.15
10.00
3.74
7.47
100
3 Lines
3 Lines
20 Lines
11.0 Lines
9 Lines
262.5 Lines
525 Lines
190.67
190.67
1271.12
699.12
6 EQP Pulses
6 Serration Pulses
0.075V
±
0.005V
0.04V
±
0.006V
9 Lines/Field
16.683 ms/Field
33.367 ms/Frame
7.62
4.20
3.63
16.683 ms
33.367 ms
相關(guān)PDF資料
PDF描述
74ACT715SC 8-Bit LVTTL-GTLP Adjustable-Edge-Rate Registered Transceiver with Split LVTTL Port and Feedback Path 48-TSSOP -40 to 85
74ACT715-R Programmable Video Sync Generator
74ACT715-RSCX TV/Video Sync Circuit
74ACT715SCX TV/Video Sync Circuit
74ACT821MTC 10-Bit D-Type Flip-Flop
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74ACT715PC_Q 功能描述:視頻 IC Prog Vid Sync Gen RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
74ACT715RPC 功能描述:視頻 IC Prog Vid Sync Gen RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
74ACT715RSC 功能描述:視頻 IC Prog Vid Sync Gen RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
74ACT715-RSC 功能描述:IC GEN PROG VIDEO SYNC 20-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話,手機(jī),視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
74ACT715RSCX 功能描述:視頻 IC Prog Vid Sync Gen RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel