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參數(shù)資料
| 型號： | 74ACT563SCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit D-Type Latch |
| 中文描述： | ACT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 45K |
| 代理商： | 74ACT563SCX |
www.fairchildsemi.com
2
7
Functional Description
The ACT563 contains eight D-type latches with 3-STATE
complementary outputs. When the Latch Enable (LE) input
is HIGH, data on the D
n
inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW the latches store the information that was present on
the D inputs at setup time preceding the HIGH-to-LOW
transition of LE. The 3-STATE buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers
are in the bi-state mode. When OE is HIGH the buffers are
in the high impedance mode but that does not interfere with
entering new data into the latches.
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
NC
=
No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Internal
Outputs
Function
OE
LE
D
Q
O
H
X
X
X
Z
High-Z
H
H
L
H
Z
High-Z
H
H
H
L
Z
High-Z
H
L
X
NC
Z
Latched
L
H
L
H
H
Transparent
L
H
H
L
L
Transparent
L
L
X
NC
NC
Latched
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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