參數(shù)資料
型號(hào): 74ACT18825SSCX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 通用總線(xiàn)功能
英文描述: Low-Power µP Reset Circuits in 3-Pin SC70/SOT23
中文描述: ACT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝: 0.300 INCH, MO-118, SSOP-56
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 48K
代理商: 74ACT18825SSCX
1999 Fairchild Semiconductor Corporation
DS0500292
www.fairchildsemi.com
August 1999
Revised October 1999
7
74ACT18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
Features
I
Broadside pinout allows for easy board layout
I
Separate control logic for each byte
I
Extra data width for wider address/data paths or buses
carrying parity
I
Outputs source/sink 24 mA
I
TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
FACT
, FACT Quiet Series
and GTO
are trademarks of Fairchild Semiconductor Corporation.
Order Number
74ACT18825SSC
74ACT18825MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–I
17
O
0
–O
17
Output Enable Input (Active LOW)
Inputs
Outputs
相關(guān)PDF資料
PDF描述
74ACT18825MTD 18-Bit Buffer/Line Driver with 3-STATE Outputs
74ACT18825SSC 18-Bit Buffer/Line Driver with 3-STATE Outputs
74ACT240PC-NL Octal Buffer/Line Driver with 3-STATE Outputs
74ACT240SC-NL Octal Buffer/Line Driver with 3-STATE Outputs
74ACT245MTCX-NL Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs
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