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參數(shù)資料
| 型號(hào)： | 74ACQ574SJ |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quiet Series⑩ Octal D-Type Flip-Flop with 3-STATE Outputs |
| 中文描述： | AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOP-20 |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大小： | 98K |
| 代理商： | 74ACQ574SJ |
www.fairchildsemi.com
2
7
Logic Symbols
IEEE/IEC
Functional Description
The ACQ/ACTQ574 consists of eight edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D-type inputs that meet the setup
and hold time requirements on the LOW-to-HIGH Clock
(CP) transition. With the Output Enable (OE) LOW, the
contents of the eight flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
state. Operation of the OE input does not affect the state of
the flip-flops.
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Transition
NC
=
No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Internal Outputs
Function
OE
CP
D
Q
O
N
H
H
L
NC
Z
Hold
H
H
H
NC
Z
Hold
H
L
L
Z
Load
H
H
H
Z
Load
L
L
L
L
Data Available
L
H
H
H
Data Available
L
H
L
NC
NC
No Change in Data
L
H
H
NC
NC
No Change in Data
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