參數資料
型號： 74ACQ464ASPC
廠商： Fairchild Semiconductor Corporation
英文描述： Quiet Series⑩ Octal Transceiver/Register with 3-STATE Outputs
中文描述： 安靜系列⑩八路收發(fā)器/ 3注冊態(tài)輸出
文件頁數： 6/10頁
文件大小： 97K
代理商： 74ACQ464ASPC
www.fairchildsemi.com
6
7
AC Electrical Characteristics for ACQ
Note 14:
Voltage Range 3.3 is 3.3V
±
0.3V.
Voltage Range 5.0 is 5.0V
±
0.5V
Note 15:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACQ
Note 16:
Voltage Range 5.0 is 5.0V
±
0.5V
Voltage Range 3.3 is 3.3V
±
0.3V
V
CC
T
A
=
+
25
°
C
C
L
=
50 pF
Typ
9.0
6.5
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Min
3.5
2.5
Symbol
Parameter
(V)
Units
(Note 14)
3.3
5.0
Min
3.5
2.5
Max
12.0
9.0
Max
13.0
9.5
t
PLH
Propagation Delay
Bus to Bus
ns
t
PHL
Propagation Delay
Bus to Bus
Propagation Delay
3.3
5.0
3.3
3.5
2.5
3.5
9.0
6.5
10.0
12.0
9.0
13.0
3.5
2.5
3.5
13.0
9.5
14.0
ns
t
PLH
ns
Clock to Bus
Propagation Delay
Clock to Bus
5.0
3.3
5.0
2.5
3.5
2.5
7.0
10.0
7.0
9.5
13.0
9.5
2.5
3.5
2.5
10.5
14.0
10.5
t
PHL
ns
t
PLH
Propagation Delay
SBA or SAB to A
n
or B
n
(w/A
n
or B
n
HIGH or LOW)
Propagation Delay
SBA or SAB to A
n
or B
n
(w/A
n
or B
n
HIGH or LOW)
Enable Time
G to A
n
or B
n
Enable Time
3.3
5.0
3.5
2.5
9.5
6.5
12.5
9.0
3.5
2.5
13.5
10.0
ns
t
PHL
3.3
5.0
3.5
2.5
9.5
6.5
12.5
9.0
3.5
2.5
13.5
10.0
ns
t
PZH
3.3
5.0
3.3
3.5
2.5
3.5
10.5
8.0
10.5
14.5
10.5
14.5
3.5
2.5
3.5
15.5
11.5
15.5
ns
t
PZL
ns
G to A
n
or B
n
Disable Time
G to A
n
or B
n
Disable Time
G to A
n
or B
n
Enable Time
5.0
3.3
5.0
2.5
2.5
1.5
8.0
8.0
5.0
10.5
11.0
7.5
2.5
2.5
1.5
11.5
12.0
8.0
t
PHZ
ns
t
PLZ
3.3
5.0
3.3
2.5
1.5
4.5
8.0
5.0
11.0
11.0
7.5
15.5
2.5
1.5
4.5
12.0
8.0
17.0
ns
t
PZH
ns
DIR to A
n
or B
n
Enable Time
5.0
3.3
3.0
4.5
8.5
11.0
11.0
15.5
3.0
4.5
11.5
17.0
t
PZL
ns
DIR to A
n
or B
n
Disable Time
DIR to A
n
or B
n
Disable Time
DIR to A
n
or B
n
Output to Output Skew (Note 15)
5.0
3.3
5.0
3.0
1.5
1.0
8.5
8.0
5.0
11.0
11.0
7.5
3.0
1.5
1.0
11.5
12.0
8.0
t
PHZ
ns
t
PLZ
3.3
5.0
3.3
1.5
1.0
8.0
5.0
1.0
11.0
7.5
1.5
1.5
1.0
12.0
8.0
1.5
ns
t
OS
ns
5.0
0.5
1.0
1.0
Symbol
Parameter
V
CC
T
A
=
+
25
°
C
Typ
T
A
=
40
°
C to
+
85
°
C
Guaranteed Minimum
Units
(Note 16)
3.3
t
S
Setup Time, HIGH or LOW
3.0
3.0
ns
Bus to Clock
Hold Time, HIGH or LOW
Bus to Clock
5.0
3.3
5.0
3.0
1.5
1.5
3.0
1.5
1.5
t
H
ns
t
W
Clock Pulse Width
HIGH or LOW
3.3
5.0
4.0
4.0
4.0
4.0
ns
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