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參數(shù)資料
| 型號： | 74AC16821 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 20-Bit Bus Flip-Flops 3-State outputs(20位總線接口觸發(fā)器(三態(tài)輸出)) |
| 中文描述： | 20位總線觸發(fā)器三態(tài)輸出（20位總線接口觸發(fā)器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 81K |
| 代理商： | 74AC16821 |
54AC16821,74AC16821
20-BIT BUS INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS401 – SEPTEMBER 1991
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1991, Texas Instruments Incorporated
1
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other specifications
are design goals. Texas Instruments reserves the right to change or
discontinue these products without notice.
Members of the Texas Instruments
Widebus
Family
Packaged in Shrink Small-Outline 300-mil
Packages (DL) and 380-mil Fine-Pitch
Ceramic Flat Packages Using 25-mil
Center-to-Center Pin Spacings
Provides Extra Data Width Necessary for
Wider Address/Data Paths or Buses with
Parity
Flow-Through Architecture to Optimize
Printed-Circuit-Board (PCB) Layout
Distributed V
CC
and GND Pin Configuration
to Minimize High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
500-mA Typical Latch-Up Immunity at 125
°
C
description
These 20-bit flip-flops feature three-state outputs
designed specifically for driving highly-capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
These devices can be used as two 10-bit flip-flops
or one 20-bit flip-flop.
On the positive transition of the clock the Q outputs
will follow the D inputs. A buffered output enable
(OE) input can be used to place the twenty outputs
in either a normal logic state (high or low) or a
high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus
lines significantly. The output enable (OE) does
not affect the internal operation of the flip-flops.
Old data can be retained or new data can be
entered
while
the
high-impedance state.
outputs
are
in
the
The 74AC16821 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count
and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54AC16821 is characterized over the full military temperature range of –55
°
C to 125
°
C. The 74AC16821
is characterized for operation from –40
°
C to 85
°
C.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
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1OE
1Q1
1Q2
GND
1Q3
1Q4
V
CC
1Q5
1Q6
1Q7
GND
1Q8
1Q9
1Q10
2Q1
2Q2
2Q3
GND
2Q4
2Q5
2Q6
V
CC
2Q7
2Q8
GND
2Q9
2Q10
2OE
1CLK
1D1
1D2
GND
1D3
1D4
V
CC
1D5
1D6
1D7
GND
1D8
1D9
1D10
2D1
2D2
2D3
GND
2D4
2D5
2D6
V
CC
2D7
2D8
GND
2D9
2D10
2CLK
16821...WD PACKAGE
16821...DL PACKAGE
(TOP VIEW)
P
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74AC16821DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16822DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16823 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 74AC16823DL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74AC16823DLR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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