參數(shù)資料
型號(hào): 74AC138SJX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 2/9頁(yè)
文件大小: 0K
描述: DECODER/DEMUX 1-OF-8 16SOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74AC
類型: 解碼器/多路分解器
電路: 1 x 3:8
獨(dú)立電路: 1
輸出電流高,低: 24mA,24mA
電壓電源: 單電源
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOP
包裝: 帶卷 (TR)
www.fairchildsemi.com
2
74AC138
74ACT138
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Functional Description
The AC/ACT138 high-speed 1-of-8 decoder/demultiplexer
accepts three binary weighted inputs (A0, A1, A2) and,
when enabled, provides eight mutually exclusive active-
LOW outputs (O0–O7). The AC/ACT138 features three
Enable inputs, two active-LOW (E1, E2) and one active-
HIGH (E3). All outputs will be HIGH unless E1 and E2 are
LOW and E3 is HIGH. This multiple enable function allows
easy parallel expansion of the device to a 1-of-32 (5 lines
to 32 lines) decoder with just four AC/ACT138 devices and
one inverter (see Figure 1). The AC/ACT138 can be used
as an 8-output demultiplexer by using one of the active
LOW Enable inputs as the data input and the other Enable
inputs as strobes. The Enable inputs which are not used
must be permanently tied to their appropriate active-HIGH
or active-LOW state.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
FIGURE 1. Expansion to 1-of-32 Decoding
Inputs
Outputs
E1
E2
E3
A0
A1
A2
O0
O1
O2
O3
O4
O5
O6
O7
H
X
HHH
HH
X
H
X
HHH
HH
X
L
X
HHH
HH
LL
H
LLL
L
H
L
H
L
H
L
H
HHH
HH
L
H
L
H
L
HH
L
HHH
HH
L
HH
H
L
H
L
H
HH
H
L
H
L
H
HHH
H
L
H
L
H
L
H
HHH
HH
L
H
L
H
L
HH
HHH
L
H
L
H
HHH
H
L
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