參數(shù)資料
型號: 74ABTH16260
廠商: NXP Semiconductors N.V.
英文描述: 12-bit to 24-bit multiplexed D-type latches 3-State
中文描述: 12位至24位復(fù)用D型鎖存器三態(tài)
文件頁數(shù): 5/12頁
文件大?。?/td> 79K
代理商: 74ABTH16260
Philips Semiconductors
Product specification
74ABT16260
74ABTH16260
12-bit to 24-bit multiplexed D-type latches (3-State)
1998 Feb 10
5
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise specified)
1
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
MIN
MAX
V
CC
V
I
V
O
I
O
I
IK
I
OK
Supply voltage range
–0.5
7
V
Input voltage range
see Note 2
–0.5
7
V
Voltage range applied to any output in the high state or power-off state
–0.5
5.5
V
Current into any output in the low state
128
mA
Input clamp current
V
I
< 0
V
O
< 0
see Note 3
–18
mA
Output clamp current
–50
mA
Maximum power dissipation at T
amb
= 55
°
C (in still air)
Storage temperature range
1.4
W
T
stg
–65
+150
°
C
NOTES:
1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating
Conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature of 150
°
C and a board trace length of 750 mils.
RECOMMENDED OPERATING CONDITIONS
1
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
MAX
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
t
/v
t
/V
CC
T
amb
NOTE:
1. Unused or floating inputs must be held high or low.
Supply voltage
4.5
5.5
V
High-level input voltage
2
V
Low-level input voltage
0.8
V
Input voltage
0
V
CC
–32
V
High-level output current
mA
Low-level output current
64
mA
Input transition rise or fall rate
Outputs enabled
10
ns/V
Power-up ramp rate
200
μ
s/V
°
C
Operating free-air temperature
–40
+85
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