參數(shù)資料
型號(hào)： 74ABT648D
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Quadruple D-Type Flip-Flops With Clear 16-SO 0 to 70
中文描述： ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
封裝： 7.50 MM, PLASTIC, SOT-137-1, SO-24
文件頁(yè)數(shù)： 2/14頁(yè)
文件大?。?/td> 120K
代理商： 74ABT648D
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
2
1998 Jun 08
853–1613 19516
FEATURES
Combines 74ABT245 and 74ABT374 type functions in one device
Independent registers for A and B buses
Multiplexed real-time and stored data
Output capability: +64mA/–32mA
Power-up 3-state
Power-up reset
Live insertion/extraction permitted
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT648 transceiver/register consists of bus transceiver
circuits with inverting 3-State outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from
the input bus or the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
Outputs from real-time, or stored registers will be inverted. When an
output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses,
A or B may be driven at a time. The examples on the next page
demonstrate the four fundamental bus management functions that
can be performed with the 74ABT648.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
Input capacitance
CP, S, OE, DIR
C
L
= 50pF; V
CC
= 5V
5.9
ns
C
IN
V
I
= 0V or V
CC
4
pF
C
I/O
I/O capacitance
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
7
pF
I
CCZ
Total supply current
110
μ
A
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74ABT648 N
74ABT648 D
74ABT648 DB
74ABT648 PW
NORTH AMERICA
74ABT648 N
74ABT648 D
74ABT648 DB
74ABT648PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
SA00082
CPAB
SAB
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
13
14
15
16
17
18
19
20
21
22
23
24
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 23
CPAB /
CPBA
A to B clock input / B to A clock
input
2, 22
SAB / SBA
A to B select input / B to A select
input
3
DIR
Direction control input
4, 5, 6, 7,
8, 9, 10, 11
A0 – A7
Data inputs/outputs (A side)
20, 19, 18, 17,
16, 15, 14, 13
B0 – B7
Data inputs/outputs (B side)
21
OE
Output enable input (active-Low)
12
GND
Ground (0V)
24
V
CC
Positive supply voltage
相關(guān)PDF資料
PDF描述
74ABT648DB Quadruple D-Type Flip-Flops With Clear 16-SO 0 to 70
74ABT648N Octal transceiver/register, inverting 3-State
74ABT648PWDH .015UF 100V 10% MONOLIT CERM CAP
74ABT651D Octal transceiver/register, inverting 3-State
74ABT651 Octal transceiver/register, inverting(3-State)(反相（三態(tài)）,八總線收發(fā)器/寄存器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74ABT648D,602 功能描述:總線收發(fā)器 OCTAL REGISTERED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT648D,623 功能描述:總線收發(fā)器 OCTAL REGISTERED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT648D-T 功能描述:總線收發(fā)器 OCTAL REGISTERED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT648PW 功能描述:總線收發(fā)器 OCTAL REGISTERED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT648PW,112 功能描述:總線收發(fā)器 OCTAL REGISTERED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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