參數(shù)資料
型號(hào): 74ABT648
廠商: NXP Semiconductors N.V.
英文描述: Octal transceiver/register, inverting(3-State)(反相(三態(tài)),八總線收發(fā)器/寄存器)
中文描述: 八路收發(fā)器/寄存器,反相(3態(tài))(反相(三態(tài)),八總線收發(fā)器/寄存器)
文件頁(yè)數(shù): 6/14頁(yè)
文件大?。?/td> 120K
代理商: 74ABT648
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
1998 Jun 08
6
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
–0.9
–1.2
–1.2
V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5
3.2
2.5
V
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0
3.7
3.0
V
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
2.0
2.3
2.0
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
IOFF
Power-off leakage current
V
CC
= 0.0V; V
I
or V
O
4.5V
±
5.0
±
100
±
100
μ
A
IPU/IPD
Power–up/down 3-State
output current
4
V
CC
= 2.1V; V
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
±
5.0
±
50
±
50
μ
A
I
I
Input leakage
Control pins
V
CC
= 5.5V; V
I
= GND or 5.5V
±
0.01
±
1.0
±
1.0
μ
A
current
Data pins
V
CC
= 5.5V; V
I
= GND or 5.5V
±
5
±
100
±
100
μ
A
I
IH
+ I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
5.0
50
50
μ
A
I
IL
+ I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
–5.0
–50
–50
μ
A
ICEX
Output high leakage current
V
CC
= 5.5V; V
O
= 5.5 V; V
I
= GND or V
CC
5.0
50
50
μ
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
–50
–65
–180
–50
–180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
110
250
250
μ
A
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
20
30
30
mA
I
CCZ
V
CC
= 5.5V; Outputs 3-State;
V
I
CC
110
250
250
μ
A
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
0.3
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1 to V
CC
= 5V
±
10% a
transition time of up to 100
μ
sec is permitted.
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