參數(shù)資料
型號(hào): 74ABT377PWADH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Octal D-type flip-flop with enable
中文描述: ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
封裝: 4.40 MM, PLASTIC, SOT-360-1, TSSOP-20
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 55K
代理商: 74ABT377PWADH
Philips Semiconductors
Product specification
74ABT377A
Octal D-type flip-flop with enable
1997 Feb 26
6
AC SETUP REQUIREMENTS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
MIN
T
amb
= -40 to +85
o
C
V
CC
= +5.0V +0.5V
MIN
UNIT
TYP
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup time, High or Low
Dn to CP
2
1.5
1.5
0.7
0.5
1.5
1.5
ns
Hold time, High or Low
Dn to CP
2
1.0
1.0
–0.4
–0.6
1.0
1.0
ns
Setup time, High or Low
E to CP
2
2.0
2.0
1.1
1.0
2.0
2.0
ns
Hold time, High or Low
E to CP
2
1.0
1.0
–0.9
–0.1
1.0
1.0
ns
Clock Pulse width
High or Low
1
1.5
2.0
0.7
1.0
1.5
2.0
ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
V
M
t
PLH
t
PHL
V
M
V
M
V
M
CP
Q
n
1/f
MAX
t
W
(H)
t
W
(L)
SA00159
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width and Maximum Clock Frequency
éééé
éééé
éééééé
éééééé
t
h
(L)
éééé
éééé
h
(H)
t
s
(H)
CP
V
M
V
M
V
M
t
s
(L)
ééééééééé
ééééééééé
ééééééééé
ééé
ééé
ééé
D
n
V
M
t
s
t
h
V
M
SA00160
NOTE: The shaded areas indicate when the input is permitted to change for predict-
able output performance.
Waveform 2. Data and Enable Setup and Hold Times
相關(guān)PDF資料
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