參數(shù)資料
型號(hào)： 74ABT02PWDH
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Quad 2-input NOR gate
中文描述： ABT SERIES, QUAD 2-INPUT NOR GATE, PDSO14
封裝： PLASTIC, TSSOP1-14
文件頁數(shù)： 3/10頁
文件大小： 95K
代理商： 74ABT02PWDH
Philips Semiconductors
Product specification
74ABT02
Quad 2-input NOR gate
1995 Sep 18
3
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
DC supply voltage
–0.5 to +7.0
V
DC input diode current
DC input voltage
3
V
I
< 0
–18
mA
–1.2 to +7.0
V
DC output diode current
DC output voltage
3
V
O
< 0
–50
mA
output in Off or High state
–0.5 to +5.5
V
DC output current
output in Low state
40
mA
°
C
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
4.5
MAX
5.5
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
t/
v
T
amb
DC supply voltage
V
Input voltage
0
V
CC
V
High-level input voltage
2.0
V
Low-level input voltage
0.8
V
High-level output current
–15
mA
Low-level output current
20
mA
Input transition rise or fall rate
0
5
ns/V
°
C
Operating free-air temperature range
–40
+85
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
°
C
MIN
UNIT
MIN
TYP
–0.9
2.9
0.35
±
0.01
±
5.0
5.0
–75
2
MAX
–1.2
MAX
–1.2
V
IK
V
OH
V
OL
I
I
I
OFF
I
CEX
I
O
I
CC
Input clamp voltage
High-level output voltage
Low-level output voltage
Input leakage current
Power-off leakage current
Output High leakage current
Output current
1
Quiescent supply current
Additional supply current per
input pin
2
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –15mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 20mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; V
I
= GND or V
CC
V
= 5.5V; One data input at 3.4V, other
inputs at V
CC
or GND
V
V
V
μ
A
μ
A
μ
A
mA
μ
A
2.5
2.5
0.5
±
1.0
±
100
50
–180
50
0.5
±
1.0
±
100
50
–180
50
–50
–50
I
CC
0.25
500
500
μ
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
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74ABT02 Quad 2-input NOR gate
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