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參數(shù)資料
| 型號(hào)： | 74ABH16244ADL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-bit buffer/line driver 3-State |
| 中文描述： | ABT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | 74ABH16244ADL |
Philips Semiconductors
Product specification
74ABT16244A
74ABTH16244A
16-bit buffer/line driver (3-State)
1998 Oct 07
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
°
C
Min
UNIT
Min
Typ
Max
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
I
= GND or 5.5V
V
= 5.5V; V
I
= V
CC
or GND
V
CC
= 5.5V; V
I
= V
CC
V
CC
= 5.5V; V
I
= 0
V
CC
= 4.5V; V
I
= 0.8V
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.0V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= V
CC
–0.9
–1.2
–1.2
V
2.5
2.9
2.5
V
OH
High-level output voltage
3.0
3.4
3.0
V
2.0
2.4
2.0
V
OL
I
I
Low-level output voltage
0.42
0.55
0.55
V
Input leakage current
±
0.01
±
1.0
±
1.0
μ
A
I
I
Input leakage current
In ut leakage current
74ABTH16244A
Control pins
±
0.01
±
1
±
1
Data Pins
0.01
1
1
μ
A
–2
–3
–5
Bus Hold current A inputs
4
74ABTH16244A
50
50
I
HOLD
–75
±
500
–75
μ
A
I
OFF
Power-off leakage current
±
5.0
±
100
±
100
μ
A
I
PU
/I
PD
Power-up/down 3-State
output current
±
5.0
±
50
±
50
μ
A
I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= V
IL
or V
IH
0.1
10
10
μ
A
I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.0V; V
I
= V
IL
or V
IH
–0.1
–10
–10
μ
A
I
CEX
Output High leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
μ
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
–50
–100
–180
–50
–180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.45
1.0
1.0
mA
I
CCL
Quiescent supply current
3
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
10
19
19
mA
I
CCZ
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
0.45
1.0
1.0
μ
A
Outputs enabled, one data input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
100
250
250
I
CC
Additional supply current per
input pin
2, 3
in ut in
Outputs disabled, one data input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
100
250
250
μ
A
Control pins, outputs disabled, one enable
input at 3.4V, other inputs at V
CC
or GND;
V
CC
= 5.5V
100
250
250
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This data sheet limit may vary among suppliers.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
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