參數(shù)資料
型號(hào)： 73S1209F-68IMR/F/P
廠商： Maxim Integrated Products
文件頁數(shù)： 118/123頁
文件大?。?/td> 0K
描述： IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： 73S12xx
核心處理器： 80515
芯體尺寸： 8-位
速度： 24MHz
連通性： I²C，智能卡，UART/USART
外圍設(shè)備： LED，POR，WDT
輸入/輸出數(shù)： 9
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
73S1209F Data Sheet
DS_1209F_004
Byte Control Register (SByteCtl): 0xFE12
0x2C
This register controls the processing of characters and the detection of the TS byte. When receiving, a
Break is asserted at 10.5 ETU after the beginning of the start bit. Break from the card is sampled at 11
ETU.
Table 90: The SByteCtl Register
MSB
LSB
–
DETTS
DIRTS
BRKDUR.1
BRKDUR.
0
–
Bit
Symbol
Function
SByteCtl.7
–
SByteCtl.6
DETTS
Detect TS Byte – 1 = Next Byte is TS, 0 = Next byte is not TS. When
set, the hardware will treat the next character received as the TS and
determine if direct or indirect convention is being used. Direct
convention is the default used if firmware does not set this bit prior to
transmission of TS by the smart card to the firmware. The hardware will
check parity and generate a break as defined by the DISPAR and
BRKGEN bits in the parity control register. This bit is cleared by
hardware after TS is received. TS is decoded before being stored in
the receive FIFO.
SByteCtl.5
DIRTS
Direct Mode TS Select – 1 = direct mode, 0 = indirect mode.
Set/cleared by hardware when TS is processed indicating either
direct/indirect mode of operation. When switching between smart
cards, the firmware should write the bit appropriately since this register
is not unique to an individual smart card (firmware should keep track of
this bit).
SByteCtl.4
BRKDUR.1
Break Duration Select – 00 = 1 ETU, 01 = 1.5 ETU, 10 = 2 ETU, 11 =
reserved. Determines the length of a Break signal which is generated
when detecting a parity error on a character reception in T=0 mode.
SByteCtl.3
BRKDUR.0
SByteCtl.2
–
SByteCtl.1
–
SByteCtl.0
–
94
Rev. 1.2
相關(guān)PDF資料
PDF描述
73S1210F-68IMR/F/P IC SMART CARD READER PROG 68-QFN
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參數(shù)描述
73S1209F-68M/F/P1 功能描述:8位微控制器 -MCU Contained 80515-SoC Serial Hst Interface RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
73S1209F-EB 功能描述:開發(fā)板和工具包 - 8051 73S1209F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1209F-IM44 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
73S1209F-IM44 EB 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Eval Brd Eval Bd Doc Cd Cable
73S1209F-IM68 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
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