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參數(shù)資料
| 型號： | 69F1608RPFI |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | PROM |
| 英文描述： | 128 Megabit (16M x 8-Bit) Flash Memory Module |
| 中文描述： | 16M X 8 FLASH 5V PROM MODULE, 35 ns, DFP24 |
| 封裝： | DFP-24 |
| 文件頁數(shù)： | 2/33頁 |
| 文件大小： | 817K |
| 代理商： | 69F1608RPFI |
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2
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
128 Megabit (16Mx 8-Bit) Flash Memory Module
69F1608
01.07.05 REV 2
T
ABLE
1. P
INOUT
D
ESCRIPTION
P
IN
S
YMBOL
D
ESCRIPTION
1, 24
V
CC
Supply Voltage
2
Command Latch Enable
(CLE)
The CLE input controls the path activation for commands sent to
the command register. When active high, commands are latched
into the command register through the I/O ports on the rising
edge of the WE signal.
3
Address Latch Enable
(ALE)
The ALE input controls the path activation for address and input
data to the internal address/data register. Addresses are latched
on the rising edge or WE with ALE high, and input data is latched
when ALE is low
4
Write Enable
(WE)
The WE input controls writes to the I/O port. Commands,
address and data are latched on the rising edge of the WE
pulse.
5
Write Protect
(WP)
The WP pin provides inadvertent write/erase protection during
power transitions. The internal high voltage generator is reset
when the WP pin is active low
6, 7, 18, 19
Chip Enable Inputs
CE1 - CE4
The CE input is the device selection control. When CE goes high
during a read operation, the device is returned to standby mode.
However, when the device is in the busy state during programor
erase, CE high is ignored, and does not return the device to
standby mode.
8, 9, 10, 11
14, 15, 16, 17
I/O Port:
I/O0 ~I/O7
The I/O pins are used to input command, address and data, and
to output data during read operations. The I/O pins float to High-
Z when the chip is deselected or when the outputs are disabled.
12
V
SS
V
CC
Q
Ground
13
Output Buffer Voltage
20
Spare Area Enable (SE)
The SE input controls the spare area selection when SE is high,
the device is deselected the spare area during Read1, Sequen-
tial data input and page Program
21
Read/Busy
(R/B)
The R/B output indicates the status of the device operation.
When low it indicates that a program erase or randomread
operation is in process and returns to high state upon comple-
tion. It is an open drain output and does not float to High-Z condi-
tion when the chip is deselected or when outputs are disabled.
22
Read Enable
(RE)
The RE inputs is the serial data-out control, and when active
drives the data onto the I/O bus. Data is valid t
REA
after the falling
edge of RE which also increments the internal column address
counter by one.
23
NC
No Connection
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