參數(shù)資料
型號: 69F1608RPFE
廠商: MAXWELL TECHNOLOGIES
元件分類: PROM
英文描述: 128 Megabit (16M x 8-Bit) Flash Memory Module
中文描述: 16M X 8 FLASH 5V PROM MODULE, 35 ns, DFP24
封裝: DFP-24
文件頁數(shù): 25/33頁
文件大小: 817K
代理商: 69F1608RPFE
25
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
128 Megabit (16Mx 8-Bit) Flash Memory Module
69F1608
01.07.05 REV 2
PAGE PROGRAM
The device is programmed basically on a page basis, but it does allow multiple partial page programmng of
a byte or consecutive bytes up to 528, in a single page programcycle. The number of consecutive partial
page programmng operation within the same page without an intervening erase operation must not exceed
ten. The addressing may be done in any randomorder in a block. A page programcycle consists of a serial
data loading period in which up to 528 bytes of data may be loaded into the page register, followed by a non-
volatile programmng period where the loaded data is programmed into the appropriate cell. Serial data
loading can be started from2nd half array. About the pointer operation, please refer to the attached technical
notes.The serial data loading period begins by inputting the Serial Data Input command (80H), followed by
the three cycle address input and then serial data loading. The bytes other than those to be programmed do
not need to be loaded.
The Page Programconfirmcommand (10h) initiates the programmng process. Writing 10h alone without
perviously entering the serial data will not initiate the programmng process. The internal write controller
automatically executes the algorithms and timngs necessary for programand verify, thereby freeing the
CPU for other tasks. Once the programprocess starts, the Read Status Register command may be entered,
with RE and CE low to read the status register. The CPU can detect the completion of a programcycle by
monitoring the R/B output, or the Status bit (I/O6) of the Status Register. Only the Read Status command
and Reset command are valid while programmng is in progress. When the Page Programis complete, the
Write Status Bit (I/O0) may be checked (Figure 26). The internal write verify detects only errors for "1"s that
are not successfully programmed to "0"s. The command register remains in Read Status command mode
until another valid command is written to the command register.
F
IGURE
26. P
ROGRAM
& R
EAD
S
TATUS
OPERATION
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