- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄369230 > 68HC05PL4B (Motorola, Inc.) 8-Bit Microcontroller Units (MCU).(8位微控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 68HC05PL4B |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁(yè)數(shù)： | 55/98頁(yè) |
| 文件大?。?/td> | 1019K |
| 代理商： | 68HC05PL4B |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)當(dāng)前第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)
April 30, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05PL4
REV 2.0
16-BIT PROGRAMMABLE TIMER
MOTOROLA
9-5
NOTE
To prevent interrupts from occurring between readings of the ACRH and ACRL,
set the I bit in the condition code register (CCR) before reading ACRH and clear
the I bit after reading ACRL.
9.3
INPUT CAPTURE REGISTERS
The input capture function is a technique whereby an external signal (connected
to PA2/TCAP pin) is used to trigger the 16-bit timer counter. In this way it is possi-
ble to relate the timing of an external signal to the internal counter value, and
hence to elapsed time.
When the input capture circuitry detects an active edge on the selected source, it
latches the contents of the free-running timer counter registers into the input cap-
ture registers as shown in
Figure 9-6
.
Latching values into the input capture registers at successive edges of the same
polarity measures the period of the selected input signal. Latching the counter val-
ues at successive edges of opposite polarity measures the pulse width of the sig-
nal.
Figure 9-6. Timer Input Capture Block Diagram
The input capture registers are made up of two 8-bit read-only registers (ICRH,
ICRL) as shown in
Figure 9-7
. The input capture edge detector contains a Schmitt
trigger to improve noise immunity. The edge that triggers the counter transfer is
defined by the input edge bit (IEDG) in the TCR. Reset does not affect the con-
tents of the input capture registers.
I
ICRH ($0014)
16-BIT COUNTER
÷
4
INTERNAL
CLOCK
(XTAL
÷
2)
TIMER
INTERRUPT
TIMER CONTROL REG.
$0012
REQUEST
INPUT CAPTURE (ICF)
RESET
ICRL ($0015)
I
TIMER STATUS REG.
$0013
INTERNAL
DATA
BUS
(
READ
ICRH
READ
ICRL
LATCH
I
EDGE
SELECT
& DETECT
LOGIC
I
TCAP
INTERNAL
DATA
BUS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 68HC705PL4 | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC908JB8FS | Freescale Semiconductor, Inc. |
| 69190-405 | 50/100M SOT-23 CMOS RF LDO REGULATORS |
| 6A20G | CURRENT 6.0 Amperes VOLTAGE 50 to 1000 Volts |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 68HC05SB7 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05V12 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:General Release Specification |
| 68HC05X1 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC070KH12 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8 BIT MICROCONTROLLER UNITS |
| 68HC08KH12 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8 BIT MICROCONTROLLER UNITS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。