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參數(shù)資料
| 型號(hào)： | 658M5I3FREQ |
| 廠商： | CTS CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 50 MHz - 250 MHz, LVCMOS OUTPUT |
| 封裝： | GREEN, CERAMIC PACKAGE-6 |
| 文件頁(yè)數(shù)： | 3/5頁(yè) |
| 文件大?。?/td> | 148K |
| 代理商： | 658M5I3FREQ |
Document No. 008-0316-0
Page 3 - 5
Rev. A
CTS Electronic Components, Inc. 171 Covington Drive Bloomingdale, IL 60108
Model 658
7x5mm Low Cost
LVCMOS, LVPECL or LVDS Clock
CMOS/TTL OUTPUT WAVEFORM
TEST CIRCUIT, CMOS LOAD
PECL/LVDS OUTPUT WAVEFORM
TEST CIRCUIT, PECL LOAD
TEST CIRCUIT, LVDS LOAD
ENABLE TRUTH TABLE
PIN 1 or 2
PIN 4 / PIN 5
Logic ‘1’
Output
Open
Output
Logic ‘0’
High Imp.
D.U.T. PIN ASSIGNMENTS
PIN
SYMBOL
DESCRIPTION
1
EOH / NC
Enable or No Connect
2
NC / EOH
No Connect or Enable
3
GND
Circuit & Package Ground
4
Output
RF Output
5
Output / NC
Complimentary RF Output
(PECL and LVDS Only)
6
VCC
Supply Voltage
Tr
Tf
UPTIME (t)
PERIOD (T)
90%, 80%, 2.4V
50%, 1.5V
10%, 20%, 0.5V
DUTY CYCLE = t/T x 100 (%)
V
OH
OL
POWER
SUPPLY
+
-
+-
-
+
VM
mA
0.01uF
D.U.T.
64
12
N.C. or Enable Input
3
5
N.C.
Including probe
capacitance.
C L
Enable Input or N.C.
Tr
Tf
UPTIME (t)
PERIOD (T)
80%
50%
20%
DUTY CYCLE = t/T x 100 (%)
OUT
OH
V
OL
V
VOS
POWER
SUPPLY
+
-
+-
-
+
VM
mA
0.01uF
D.U.T.
64
12
N.C. or Enable Input
3
5
CH1
CH2
50
R L
50
Vcc - 2.0V
Enable Input or N.C.
POWER
SUPPLY
+
-
+-
-
+
VM
mA
0.01uF
D.U.T.
64
12
N.C. or Enable Input
3
5
CH1
CH2
100
R L
Enable Input or N.C.
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