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參數(shù)資料
| 型號： | 6501 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs |
| 中文描述： | 8位三雙電源翻譯器態(tài)輸出 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 75K |
| 代理商： | 6501 |
5
www.fairchildsemi.com
7
Capacitance
Note 9:
C
PD
is measured at 10 MHz
8-Bit Dual Supply Translating Transceiver
The LVX3245 is a dual supply device capable of bidirec-
tional signal translation. This level shifting ability provides
an efficient interface between low voltage CPU local bus
with memory and a standard bus defined by 5V I/O levels.
The device control inputs can be controlled by either the
low voltage CPU and core logic or a bus arbitrator with 5V
I/O levels.
Manufactured on a sub-micron CMOS process, the
LVX3245 is ideal for mixed voltage applications such as
notebook computers using 3.3V CPU
’
s and 5V peripheral
devices.
Power Up Considerations
To insure that the system does not experience unneces-
sary I
CC
current draw, bus contention, or oscillations during
power up, the following guidelines should be adhered to
(refer to Table 1):
Power up the control side of the device first. This is the
V
CCA
.
OE should ramp with or ahead of V
CCA
. This will help
guard against bus contention.
The Transmit/Receive control pin (T/R) should ramp with
V
CCA
, this will ensure that the A Port data pins are con-
figured as inputs. With V
CCA
receiving power first, the A
I/O Port should be configured as inputs to help guard
against bus contention and oscillations.
A side data inputs should be driven to a valid logic level.
This will prevent excessive current draw.
The above steps will ensure that no bus contention or oscil-
lations, and therefore no excessive current draw occurs
during the power up cycling of these devices. These steps
will help prevent possible damage to the translator devices
and potential damage to other system components.
TABLE 1. Low Voltage Translator Power Up Sequencing Table
Please reference Application Note AN-5001 for more detailed information on using Fairchild
’
s LVX Low Voltage Dual
Supply CMOS Translating Transceivers.
Symbol
C
IN
C
I/O
Parameter
Typ
4.5
Units
pF
Conditions
Input Capacitance
Input/Output
V
CC
=
Open
V
CCA
=
3.3V
V
CCB
=
5.0V
V
CCB
=
5.0V
V
CCA
=
3.3V
15
pF
Capacitance
Power Dissipation
Capacitance (Note 9)
C
PD
A
→
B
B
→
A
55
40
pF
Device Type
V
CCA
V
CCB
T/R
OE
A Side I/O
B Side I/O
Floatable Pin
Allowed
74LVX3245
3V
5V
ramp
ramp
logic
outputs
No
(power up 1st)
configurable
with V
CCA
with V
CCA
0V or V
CCA
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