參數(shù)資料
型號(hào)： 5962R9584506VXC
英文描述： 5-Pin, Multiple-Input, Programmable Reset ICs
中文描述： x8的SRAM
文件頁數(shù)： 5/41頁
文件大?。?/td> 290K
代理商： 5962R9584506VXC
SIZE
A
5962-94663
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
F
SHEET
5
DSCC FORM 2234
APR 97
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883
MIL-STD-1835 -
-
Test Methods Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS
cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the
documents cited in the solicitation.
INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE)
IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture.
(Applications for copies should be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane,
Piscataway, NJ 08854-4150.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents may also be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class
M.
相關(guān)PDF資料
PDF描述
5962R9584506VYC x8 SRAM
5962R9584506VZC 5-Pin, Multiple-Input, Programmable Reset ICs
5962R9671702TRC 5-Pin µP Supervisory Circuits with Watchdog and Manual Reset
5962R9671702TXC Dual 4-Bit Inverting Buffer/Driver
5962R9671902TRC 5-Pin µP Supervisory Circuits with Watchdog and Manual Reset
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