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參數(shù)資料
| 型號(hào)： | 5962F9652402VXA |
| 元件分類： | 門電路 |
| 英文描述： | AC SERIES, HEX 1-INPUT INVERT GATE, CDFP14 |
| 封裝： | CERAMIC, BOTTOM BRAZED, DFP-14 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 177K |
| 代理商： | 5962F9652402VXA |
3
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS14E
7
( V
DD
= 3.0V to 5.5V; V
SS
= 0V
6
; -55
°
C < T
C
< +125
°
C)
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density
≤
5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose
≤
1E6 rads(Si) per MIL-STD-883 Method 1019 Condition B.
8. Power dissipation specified per switching output.
9. This value is guaranteed based on characterization data, but not tested.
SYMBOL
Description
CONDITION
VDD
MIN
MAX
UNIT
V
T+
Schmitt trigger positive-going
threshold
1
3.0V
2.1
V
5.5V
3.85
V
T-
Schmitt trigger negative-going
threshold
1
3.0V
0.9
V
5.5V
1.65
V
H
Hysteresis
2
(V
T+
- V
T-
)
3.0V
0.3
1.2
V
4.5V
.6
1.5
I
IN
Input leakage current
V
IN
= V
DD
or V
SS
5.5V
-1
1
μ
A
V
OL
Low-level output voltage
3
I
OL
= 100
μ
A
3.0V
0.25
V
4.5V
0.25
V
OH
High-level output voltage
3
I
OH
= -100
μ
A
3.0V
2.75
V
4.5V
4.25
I
OS
Short-circuit output current
2 ,4
V
O
= V
DD
and V
SS
3.0V
-100
100
mA
5.5V
-200
200
I
OL
Low level output current
9
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
3.0V
6
mA
5.5V
8
I
OH
High level output current
9
V
IN
= V
DD
or V
SS
V
OH
= V
DD
-0.4V
3.0V
-6
mA
5.5V
-8
P
total
Power dissipation
2, 8
C
L
= 50pF
5.5V
3.0V
1.9
0.76
mW/
MHz
I
DDQ
Quiescent Supply Current
V
IN
= V
DD
or V
SS
5.5V
10
μ
A
C
IN
Input capacitance
5
= 1MHz
0V
15
pF
C
OUT
Output capacitance
5
= 1MHz
0V
15
pF
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