•
    參數(shù)資料
    型號(hào)： 5962F9584505QYC
    英文描述： x8 SRAM
    中文描述： x8的SRAM
    文件頁數(shù)： 1/41頁
    文件大?。?/td> 290K
    代理商： 5962F9584505QYC
    REVISIONS
    LTR
    DESCRIPTION
    DATE (
    YR-MO-DA
    )
    APPROVED
    A
    Add device types 04, 05, and 06. Modify boilerplate to include rad hard
    requirements. Editorial changes throughout.
    96-03-13
    Monica L. Poelking
    B
    Add device types 07, 08, and 09. Update boilerplate. Editorial changes
    throughout. – TVN
    98-08-27
    Monica L. Poelking
    C
    In table I, change I
    IN
    limits; add footnote to I
    DDQ
    ; add t
    c
    in power-up master reset
    timing section; add footnote to V
    OS
    and V
    DIS
    . Correct the JTAG timing waveforms.
    Change footnote 3/ in table III. – TVN
    99-04-28
    Monica L. Poelking
    D
    Add device types 10 and 11. Editorial changes throughout. - TVN
    00-06-27
    Monica L. Poelking
    E
    Add notes to memory write and memory read waveforms. Editorial changes
    throughout. – TVN
    01-03-13
    Thomas M. Hess
    F
    Correct dimension L for case outline Y in figure 1. Also, correct footnote 1/ for
    radiation exposure connections in figure 6. – TVN
    01-07-27
    Thomas M. Hess
    REV
    B
    B
    B
    D
    SHEET
    35
    36
    37
    38
    REV
    D
    D
    B
    B
    B
    F
    D
    D
    B
    D
    B
    E
    E
    C
    B
    F
    B
    B
    B
    B
    SHEET
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    REV
    F
    D
    D
    D
    F
    D
    D
    D
    D
    D
    D
    D
    D
    D
    REV STATUS
    OF SHEETS
    SHEET
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    PMIC N/A
    PREPARED BY
    Thomas M. Hess
    CHECKED BY
    Thomas M. Hess
    DEFENSE SUPPLY CENTER COLUMBUS
    COLUMBUS, OHIO 43216
    http://www.dscc.dla.mil
    APPROVED BY
    Monica L. Poelking
    DRAWING APPROVAL DATE
    95-03-31
    MICROCIRCUIT, DIGITAL, CMOS, SERIAL
    MICROCODED MULTI-MODE INTELLIGENT TERMINAL
    AND TRANSCEIVER, SILICON
    SIZE
    A
    CAGE CODE
    67268
    5962-94663
    STANDARD
    MICROCIRCUIT
    THIS DRAWING IS AVAILABLE
    FOR USE BY ALL
    DEPARTMENTS
    AND AGENCIES OF THE
    DEPARTMENT OF DEFENSE
    AMSC N/A
    REVISION LEVEL
    F
    SHEET 1 OF 38
    DSCC FORM 2233
    APR 97
    DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
    5962-E538-01
    相關(guān)PDF資料
    PDF描述
    5962F9584505QZC Low-Cost, Voltage-Output, 16-Bit DACs with Internal Reference in µMAX
    5962F9584505VXC x8 SRAM
    5962F9584505VYC Low-Cost, Voltage-Output, 16-Bit DACs with Internal Reference in µMAX
    5962F9584505VZC x8 SRAM
    5962F9584506QXC Low-Cost, Voltage-Output, 16-Bit DACs with Internal Reference in µMAX
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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