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參數(shù)資料
| 型號(hào)： | 5962D9568802VPX |
| 廠商： | INTERSIL CORP |
| 元件分類(lèi)： | 運(yùn)算放大器 |
| 英文描述： | OP-AMP, 7000 uV OFFSET-MAX, CDIP8 |
| 封裝： | CERAMIC, DIP-8 |
| 文件頁(yè)數(shù)： | 5/5頁(yè) |
| 文件大小： | 78K |
| 代理商： | 5962D9568802VPX |
5
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certication.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Die Characteristics
DIE DIMENSIONS:
69 mils x 66 mils x 19 mils
±1 mil
1750
m x 1420m x 483m ±25.4m
INTERFACE MATERIALS:
Glassivation:
Type: Nitride (S13N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12k
±2k
Nitride Thickness: 3.5k
±1.5k
Top Metallization:
Type: Al, 1% Cu
Thickness: 18k
±2k
Substrate:
Linear Bipolar, DI
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential (Powered Up):
Unbiased
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2 x 105 A/cm2
Transistor Count:
HS-2620RH: 140
HS-2622RH: 140
Metallization Mask Layout
HS-2620RH, HS-2622RH
BAL
-IN
+IN
V-
BAL
OUT
V+
COMP
HS-2620RH, HS-2622RH
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