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參數(shù)資料
| 型號(hào)： | 5962-9320601M2A |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, CQCC20 |
| 封裝： | LCC-20 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 163K |
| 代理商： | 5962-9320601M2A |
UC1907, UC2907, UC3907
LOAD SHARE CONTROLLER
SLUS165B – MARCH 1999 - REVISED MAY 2001
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
pin assignments
(–) SENSE: (Pin 4) This is a high-impedance pin allowing remote sensing of the system ground, bypassing any
voltage drops which might appear in the power return line. This point should be considered as the true ground.
Unless otherwise stated, all voltages are with respect to this point.
Artificial Ground: (Pin 6) This is a low-impedance-circuit ground which is exactly 250 mV above the (–) SENSE
terminal. This offset allows the ground buffer amplifier negative headroom to return all the control bias and
operating currents while maintaining a high impedance at the (–) SENSE input.
Power RTN: (Pin 5) This should be the most negative voltage available and can range from zero to 5 V below
the (–) SENSE terminal. It should be connected as close to the power source as possible so that voltage drops
across the return line and current-sensing impedances lie between this terminal and the (–) SENSE point.
VREF: (Pin 7) The internal voltage reference is a band-gap circuit set at 2.0 V with respect to the (–) SENSE
input (1.75 V above the artificial ground), and an accuracy of
±1.5%. This circuit, as well as all the other chip
functions, will work over a supply voltage range of 4.5 V to 35 V allowing operation from unregulated dc, an
auxiliary voltage, or the same output voltage that it is controlling. Under-voltage lockout has been included to
insure proper startup by disabling internal bias currents until the reference rises into regulation.
Voltage Amplifier: (Pins 11, 12) This circuit is the feedback-control-gain stage for the power module’s
output-voltage regulation, and overall-loop compensation will normally be applied around this amplifier. Its
output will swing from slightly above the ground return to an internal clamp of 2.0 V. The reference trimming is
performed closed loop, and measured at pin 11, (+) SENSE. The value is trimmed to 2 V
±1.25%.
Drive Amplifier: (Pins 8, 9, 12) This amplifier is used as an inverting buffer between the voltage amplifier’s
output and the medium used to couple the feedback signal to the power controller. It has a fixed-voltage gain
of 2.5 and is usually configured with a current-setting resistor to ground. This establishes a current-sinking
output optimized to drive optical couplers biased at any voltage from 4.5 V to 35 V, with current levels up to
20 mA. The polarity of this stage is such that an increasing voltage at the voltage amplifier’s sense input (as,
for example, at turnon) will increase the opto’s current. In a nonisolated application, a voltage signal ranging
from 0.25 V to 4.1 V may be taken from the current-setting output but it should be noted that this voltage will
also increase with increasing sense voltage and an external inverter may be required to obtain the correct
feedback polarity.
Current Amplifier: (Pins 1, 2, 3) This amplifier has differential-sensing capability for use with an external shunt
in the power-return line. The common mode range of its input will accommodate the full range between the
power return point and VCC-2 V which will allow undefined-line impedances on either side of the current shunt.
The gain is internally set at 20, giving the user the ability to establish the maximum-voltage drop across the
current-sense resistor at any value between 50 mV and 500 mV. While the bandwidth of this amplifier may be
reduced with the addition of an external-output capacitor to ground, in most cases this is not required as the
compensation of the adjust amplifier will typically form the dominant pole in the adjust loop.
Buffer Amplifier: (Pins 1, 15) This amplifier is a unidirectional buffer which drives the current-share bus. The
line which will interconnect all power modules paralleled for current sharing. Since the buffer amplifier will only
source current, it insures that the module with the highest-output current will be the master and drive the bus
with a low-impedance drive capability. All other buffer amplifiers will be inactive with each exhibiting a 10-k
load impedance to ground. The share bus terminal is protected against both shorts to ground and accidental
voltages in excess of 50 V.
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