參數(shù)資料
型號(hào)： 552CF000109BGR
廠商： SILICON LABORATORIES
元件分類： VCXO, clock
英文描述： VCXO, CLOCK, 74.25 MHz, CMOS OUTPUT
封裝： ROHS COMPLIANT, SMD, 6 PIN
文件頁數(shù)： 34/80頁
文件大?。?/td> 3734K
代理商： 552CF000109BGR
Si552
4
Rev. 0.5
Table 5. CLK± Output Phase Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.35
0.38
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.43
0.41
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.52
0.46
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.64
0.52
—
Phase Jitter (RMS)1,2,3
for FOUT of 125 to 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.42
0.58
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.48
0.60
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.57
0.64
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.67
0.68
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
Table 6. CLK± Output Period Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Period Jitter*
for FOUT < 160 MHz
JPER
RMS
—
2
—
ps
Peak-to-Peak
—
14
—
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
相關(guān)PDF資料
PDF描述
552AC000244BG VCXO, CLOCK, 64 MHz, LVPECL OUTPUT
552AD000209BGR VCXO, CLOCK, 155.52 MHz, LVPECL OUTPUT
552AB000107BGR VCXO, CLOCK, 669.32658 MHz, LVPECL OUTPUT
552AE000274BG VCXO, CLOCK, 400 MHz, LVPECL OUTPUT
552AF000112BGR VCXO, CLOCK, 644.53125 MHz, LVPECL OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
552CF000118DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 74.175824MHZ/74.25MHZ VCXO CMOS 6PIN - Trays
552CF000118DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 74.175824MHZ/74.25MHZ VCXO CMOS 6PIN - Tape and Reel
552CF000174DG 功能描述:VCXO振蕩器 DUAL VCXO 6 PIN 0.5PS RS JTR RoHS:否 制造商:Fox 封裝 / 箱體:5 mm x 3.2 mm 頻率:19.2 Mhz 頻率穩(wěn)定性:2.5 PPM 輸出格式: 封裝:Reel 電源電壓:3 V 端接類型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作溫度:- 20 C 最大工作溫度:+ 75 C
552CF000174DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 45.1584MHZ/49.152MHZ VCXO CMOS 6PIN - Tape and Reel
552CF000230DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 22.5792MHZ/24.576MHZ VCXO CMOS 6PIN - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*