參數(shù)資料
型號： 550AA622M080BG
廠商： SILICON LABORATORIES
元件分類： VCXO, clock
英文描述： VCXO, CLOCK, 622.08 MHz, LVPECL OUTPUT
封裝： ROHS COMPLIANT, SMD, 6 PIN
文件頁數(shù)： 34/44頁
文件大?。?/td> 556K
代理商： 550AA622M080BG
Si550
4
Rev. 0.5
Table 5. CLK± Output Phase Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.35
0.38
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.43
0.41
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.52
0.46
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.64
0.52
—
Phase Jitter (RMS)1,2,3
for FOUT of 125 to 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.42
0.58
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.48
0.60
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.57
0.64
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.67
0.68
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
Table 6. CLK± Output Period Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Period Jitter*
for FOUT < 160 MHz
JPER
RMS
—
2
—
ps
Peak-to-Peak
—
14
—
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
相關(guān)PDF資料
PDF描述
550BA74M1758BG VCXO, CLOCK, 74.1758 MHz, LVDS OUTPUT
550BB250M000BGR VCXO, CLOCK, 250 MHz, LVDS OUTPUT
550CD64M0000BGR VCXO, CLOCK, 64 MHz, CMOS OUTPUT
550CE21M3980BGR VCXO, CLOCK, 21.398 MHz, CMOS OUTPUT
550CE21M3980BG VCXO, CLOCK, 21.398 MHz, CMOS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
550AA622M080DG 制造商:Silicon Laboratories Inc 功能描述:
550AA669M326DG 制造商:Silicon Laboratories Inc 功能描述:
550AA669M326DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 669.326MHZ VCXO LVPECL 6SMD - Tape and Reel
550AA670M000DG 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays
550AA670M000DGR 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Tape and Reel
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*