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參數(shù)資料
| 型號(hào)： | 54ACTQ32J-QMLV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 門電路 |
| 英文描述： | ACT SERIES, QUAD 2-INPUT OR GATE, CDIP14 |
| 文件頁(yè)數(shù)： | 5/6頁(yè) |
| 文件大?。?/td> | 19K |
| 代理商： | 54ACTQ32J-QMLV |
MV54ACTQ32-X REV 1A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC:
VCC 4.5V to 5.5V, Temp. Range: -55C to 125C.
SYMBOL
PARAMETER
CONDITIONS
NOTES
PIN-
NAME
MIN
MAX
UNIT
SUB-
GROUPS
VIKH
VCC=4.5V, IKH=18mA
1, 2 INPUT
5.7
V
1, 2,
3
VILD
Maximum Low Level
Dynamic Input
Voltage
VCC=5.0V, LOAD 50pF / 500 OHMS
6, 9 INPUT
0.8
V
4
VIHD
Minimum High
Level Dynamic
Input Voltage
VCC=5.0V, LOAD 50pF / 500 OHMS
6, 9 INPUT
2.2
V
4
VOLP
Quiet Output
Maximum Dynamic
VOL
VCC=5.0V, LOAD 50pF / 500 OHMS
6, 8 OUTPUT
1.5
V
4
VOLV
Quiet Output
Minimum Dynamic
VOL
VCC=5.0V, LOAD 50pF / 500 OHMS
6, 8 OUTPUT
-1.2
V
4
AC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC:
CL=50pf, RL=500 OHMS TRISE=3.0ns & TFALL=3.0ns.
tpLH
Propagation Delay
VCC=4.5V
3,
4, 7
An/Bn
to On
1.5
7.0
ns
9
3,
4, 7
An/Bn
to On
1.5
7.5
ns
10, 11
tpHL
Propagation Delay
VCC=4.5V
3,
4, 7
An/Bn
to On
1.5
7.0
ns
9
3,
4, 7
An/Bn
to On
1.5
7.5
ns
10, 11
tOSLH
Output to Output
Skew
VCC=4.5V
6
On to
On
1.0
ns
9, 10,
11
tOSHL
Output to Output
Skew
VCC=4.5V
6
On to
On
1.0
ns
9, 10,
11
Note 1:
SCREEN TESTED 100% ON EACH DEVICE AT +25C & +125C TEMPERATURE, SUBGROUPS 1, 2, 7, &
8.
Note 2:
SAMPLE TESTED (METHOD 5005, TABLE 1) ON EACH MFG. LOT AT +25C, +125C & -55C
TEMPERATURE, SUBGROUPS A1, 2, 3, 7, & 8.
Note 3:
SCREEN TESTED 100% ON EACH DEVICE AT +25C TEMPERATURE ONLY SUBGROUP A9.
Note 4:
SAMPLE TESTED (METHOD 5005, TABLE 1) ON EACH MFG. LOT AT +25C, +125C & -55C
TEMPERATURE, SUBGROUPS A9, 10 & 11.
Note 5:
TRANSMISSION LINE DRIVING TEST, GUARDBANDED LIMITS SET FOR +25C, 2 MSEC DURATION MAX.
Note 6:
GUARANTEED BUT NOT TESTED. (DESIGN CHARACTERIZATION DATA)
Note 7:
+25C & +125C MIN LIMITS GUARANTEED FOR 5.5V BY GUARDBANDING 4.5V MINIMUM LIMITS.
Note 8:
MAX NUMBER OF OUTPUTS DEFINED AS (N).
DATA INPUTS ARE DRIVEN 0V TO 3V. ONE OUTPUT @
VOL.
Note 9:
MAX NUMBER OF DATA INPUTS (N) SWITCHING. (N-1) INPUTS SWITCHING 0V TO 3V.
INPUT-UNDER-TEST SWITCHING 3V TO THRESHOLD (VILD), 0V TO THRESHOLD (VIHD), FREQ= 1
MHZ.
5
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 54ACTQ32JRQMLV | 制造商:Texas Instruments 功能描述: |
| 54ACTQ32L | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Quiet Series Quad 2-Input OR Gate |
| 54ACTQ32LMQB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOGIC GATE|QUAD 2-INPUT OR|ACT-CMOS|LLCC|20PIN|CERAMIC |
| 54ACTQ32QML | 制造商:TI 制造商全稱:Texas Instruments 功能描述:54ACTQ32QML Quiet Series Quad 2-Input OR Gate |
| 54ACTQ32W-QMLV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input OR Gate |
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