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參數(shù)資料
| 型號(hào)： | 500X44W404MV4T |
| 元件分類： | 數(shù)據(jù)傳輸濾波器 |
| 英文描述： | 1 FUNCTIONS, 50 V, DATA LINE FILTER |
| 封裝： | EIA STD PACKAGE SIZE 1410, 3 PIN |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 980K |
| 代理商： | 500X44W404MV4T |
2
www.johanson dielectrics.com
X2Y Technology Overview
X2Y components share many common traits with conventional multi-layer ceramic capacitors (MLCC) to facilitate adoption by end-users into their
manufacturing processes
Same component sizes (0603, 0805, 1206, etc.)
Same pick and place equipment
Same voltage ratings
Same dielectric, electrode and termination materials
Same industry test standards for component reliability
The X2Y design - A Capacitive Circuit
A standard bypass capacitor has opposing electrode layers stacked inside. An X2Y adds another set of electrode layers to effectively surround each
existing electrode within the stack of a two-terminal capacitor. The only external difference is two additional side terminations, creating a four-terminal
capacitive circuit, which allows circuit designers a multitude of attachment options.
X2Y for Today’s Circuits
Circuit designers today are challenged with maintaining Signal and Power Integrity amid increasing Electro-Magnetic Compliance (EMC) requirements,
while at the same time lowering system costs. X2Y Technology is an enabler to this end, providing a quantum leap in circuit performance. X2Y
replaces multiple standard passives and Integrated Passive Components with a single device, freeing precious board space for additional active
components or design miniaturization. In short, X2Y gives end-users the cost advantage they need to compete in today’s market.
G1
A
G2
B
G1
G2
A
B
Signal
(Pwr 1)
Return
(Pwr 2)
Signal
(Power)
Return
(Ground)
G1
G2
A
B
X2Y Circuit 1: Filtering
When used in circuit 1 configuration the X2Y filter capacitor is
connected across two signal lines. Differential mode noise is filtered
to ground by the two Y capacitors, A & B. Common mode noise is
cancelled within the device.
X2Y Circuit 2: Decoupling
When used in circuit 2 configuration A & B capacitors are placed
in parallel effectively doubling the apparent capacitance while
maintaining an ultra-low inductance.
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