參數(shù)資料
型號： 48SD6404RPFE
廠商： MAXWELL TECHNOLOGIES
元件分類： DRAM
英文描述： CAP 1200PF 100V CERAMIC MONO 5%
中文描述： 64M X 4 SYNCHRONOUS DRAM, 6 ns, DFP72
封裝： DFP-72
文件頁數(shù)： 32/42頁
文件大?。?/td> 596K
代理商： 48SD6404RPFE
48SD6404
M
em
o
ry
38
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM
01.11.05 Rev 2
Refresh
Auto-Refresh: All the banks must be precharged before executing an auto-refresh command. Since the
auto-refresh command updates the internal counter every time it is executed and determines the banks and
the ROW addresses to be refreshed, external address specification is not required. The refresh cycle is
8192 cycles / 6.4ms. (8192 cycles are requires to refresh all the ROW addresses.) The output buffer
becomes High-Z after auto-refresh start. In addition, since a precharge has been completed by an internal
operation after the auto-refresh, an additional precharge operation by the precharge command is not
required.
Self-refresh1: After executing a self-refresh command, the self-refresh operation continues while CKE is
held Low. During self-refresh operation, all ROW addresses are refreshed by the internal refresh timer. A
self-refresh is terminated by a self-refresh exit command. Before and after self-refresh mode, execute auto-
refresh to all refresh addresses in or within 6.4 ms period on the condition (1) and (2) below.
(1) Enter self-refresh mode within 7.8 us after either burst refresh or distributed refresh at equal interval until
all refresh addresses are completed.
(2) Start burst refresh or distributed refresh at equal interval to all refresh addreses within 7.8 us after exiting
from self-refresh mode.
Others
Power-down mode: The SDRAM enters power-down mode when CKE goes Low in the IDLE state. In
power-down mode, power consumption is suppressed by deactivating the input initial circuit. Power-down
mode continues while CKE is held Low. In addition, by setting CKE to High, the SDRAM exits from the
power-down mode, and command input is enabled from the next clock. In this mode, internal refresh is not
performed.
Clock suspend mode: By driving CKE to Low during a bank-active or read/write operation, the SDRAM
enters clock suspend mode. During clock suspend mode, external input signals are ignored and the internal
state is maintained. When CKE is driven High, the SDRAM terminates clock suspend mode, and command
input is enabled from the next clock. For more details, refer to the “CKE Truth Table”.
Power-up sequence: The SDRAM should use the following sequence during power-up:
The CLK, CKE, CS, DQM and DQ pins stay low until power stabilizes.
The CLK pin is stable within 100ms after power stabilizes before the following initialization sequence.
The CKE and DQM is driven high between when power stabilizes and the initialization sequence.
This SDRAM has V
CC clamp diodes for CLK, CKE, CS, DQM and DQ pins. If these pins go high before
power up, the large current flows from these pins to V
CC through the diodes.
1. Self Refresh should only be used at temperatures below 70 °C
相關(guān)PDF資料
PDF描述
48SD6404RPFH 1500PF 100V 5% MONOLITH CERM CAP
48SD6404RPFI 256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404RPFK 256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404 CAP 2.2UF 50V CERAMIC MONO 20%
48TQFP 48 PIN TQFP/TQN PACKAGE OUTLINE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
48SD6404RPFH 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404RPFI 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404RPFK 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SFK0001 制造商:MADISON CABLE / TYC 功能描述:
48SFKLF001 制造商:MADISON CABLE / TYC 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*