- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄33761 > 42S16800A (Integrated Silicon Solution, Inc.) 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | 42S16800A |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| 中文描述： | 16Meg × 8，8Meg x16 |
| 文件頁(yè)數(shù)： | 1/22頁(yè) |
| 文件大小： | 540K |
| 代理商： | 42S16800A |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
PRELIMINARYINFORMATION,Rev. 00C
01/20/05
Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any
time without notice.
ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
IS42S81600A,
IS42S16800A,
IS42S32400A,
ISSI
FEATURES
Clock frequency: 166,143,100 MHz
Fully synchronous; all signals referenced to a
positive clock edge
Internal bank for hiding row access/precharge
Power supply
VDD
VDDQ
IS42S81600A
3.3V
IS42S16800A
3.3V
IS42S32400A
3.3V
LVTTL interface
Programmable burst length
– (1, 2, 4, 8, full page)
Programmable burst sequence:
Sequential/Interleave
Auto Refresh (CBR)
Self Refresh with programmable refresh periods
4096 refresh cycles every 64 ms
Random column address every clock cycle
Programmable
CAS latency (2, 3 clocks)
Burst read/write and burst read/single write
operations capability
Burst termination by burst stop and precharge
command
Industrial Temperature Availability
Lead-free Availability
OVERVIEW
ISSI's 128Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer
to the rising edge of the clock
input.The 128Mb SDRAM is organized as follows.
16Meg x 8, 8Meg x16 & 4Meg x 32
128-MBIT SYNCHRONOUS DRAM
PRELIMINARY INFORMATION
JANUARY 2005
KEY TIMING PARAMETERS
Parameter
-6
-7
-10
Unit
Clk Cycle Time
CAS Latency = 3
6
7
10
ns
CAS Latency = 2
-
10
ns
Clk Frequency
CAS Latency = 3
166
143
100
Mhz
CAS Latency = 2
-
100
Mhz
Access Time from Clock
CAS Latency = 3
5.4
7
ns
CAS Latency = 2
-
6
9
ns
IS42S81600A
IS42S16800A
IS42S32400A
4M x8x4 Banks
2M x16x4 Banks
1M x32x4 Banks
54-pin TSOPII
86-pin TSOPII
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 42S32200 | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 4300-000 | EMI/RFI FILTER Hermetically Sealed |
| 4300-000LF | |
| 4300-001 | EMI/RFI FILTER Hermetically Sealed |
| 4300-001LF | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 42S16800L | 制造商:NEC 制造商全稱:NEC 功能描述:3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE |
| 42S16800L-A60 | 制造商:NEC 制造商全稱:NEC 功能描述:3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE |
| 42S16800L-A70 | 制造商:NEC 制造商全稱:NEC 功能描述:3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE |
| 42S16800L-A80 | 制造商:NEC 制造商全稱:NEC 功能描述:3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE |
| 42S17800L | 制造商:NEC 制造商全稱:NEC 功能描述:3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。