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參數(shù)資料
| 型號： | 40031AIL |
| 英文描述： | FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
| 中文描述： | FEMTOCLOCKS⑩晶體到的LVCMOS / LVTTL頻率合成器 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 181K |
| 代理商： | 40031AIL |
840031AMI
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 24, 2005
6
Integrated
Circuit
Systems, Inc.
ICS840031I
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-
LVCMOS/LVTTL C
LOCK
G
ENERATOR
A
PPLICATION
I
NFORMATION
Figure 2. C
RYSTAL
I
NPU
t I
NTERFACE
C
RYSTAL
I
NPUT
I
NTERFACE
The ICS840031I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 24.576MHz, 18pF
parallel resonant crystal and were chosen to minimize the
ppm error. The optimum C1 and C2 values can be slightly
adjusted for different board layouts.
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS840031I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
, V
, and V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10
resistor along with a 10
μ
F and a .01
μ
F bypass
capacitor should be connected to each V
DDA
pin.
F
IGURE
1. P
OWER
S
UPPLY
F
ILTERING
10
V
DDA
10
μ
F
.01
μ
F
3.3V
.01
μ
F
V
DD
C1
33p
X1
18pF Parallel Crystal
C2
22p
XTAL_OUT
XTAL_IN
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