參數(shù)資料
型號: 3433EFE
廠商: Linear Technology Corporation
英文描述: High Voltage Step-Up/Step-Down DC/DC Converter
中文描述: 高電壓降壓型DC / DC變換器
文件頁數(shù): 6/12頁
文件大小: 183K
代理商: 3433EFE
6
LT3433
3433ia
PIU
The time from V
SS
= 0V to maximum available current can
be calculated given a capacitor C
SS
as:
t
SS
= (2.7 10
5
)C
SS
or 0.27s/
μ
F
SHDN (Pin 11):
Shutdown. If the SHDN pin is externally
pulled below 0.5V, low current shutdown mode is initiated.
During shutdown mode, all internal functions are disabled,
and I
CC
is reduced to 10
μ
A. This pin is intended to receive
a digital input, however, there is a small amount of input
hysteresis built into the SHDN circuit to help assure glitch-
free mode switching. If shutdown is not desired, connect
the SHDN pin to V
IN
.
V
BIAS
(Pin 12):
Internal Local Supply. Much of the LT3433
circuitry is powered from this supply, which is internally
regulated to 2.5V through an on-board linear regulator.
Current drive for this regulator is sourced from the V
IN
pin.
The V
BIAS
supply is short-circuit protected to 5mA.
The V
BIAS
supply only sources current, so forcing this pin
above the regulated voltage allows the use of external power
for much of the LT3433 circuitry. When using external drive,
this pin should be driven above 3V to assure the internal
supply is completely disabled. This pin is typically diode-
connected to the converter output to maximize conversion
efficiency. This pin must be bypassed with at least a 0.1
μ
F
ceramic capacitor to SGND.
V
OUT
(Pin 13):
Converter Output Pin. This pin voltage is
compared with the voltage on V
IN
internally to control
operation in single or 2-switch mode. When the ratios of
the two voltages are such that a >75% duty cycle is required
for regulation, the low side switch is enabled. Drive bias for
the low side switch is also derived directly from this pin.
PWRGND (Pin 14):
High Current Ground Reference. This
is the current return for the low side switch and corresponds
to the emitter of the low side switch transistor.
SW_L (Pin 15):
Ground Referenced Switch Output. This pin
is the collector of the low side switch transistor. The low
side switch shorts the SW_L pin to PWRGND when enabled.
The series impedance of the ground-referenced switch is
0.6
.
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