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參數(shù)資料
| 型號： | 2N5565 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Matched N-Channel JFET Pairs |
| 中文描述： | 匹配N溝道場效應雙 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 48K |
| 代理商： | 2N5565 |
2N5564/5565/5566
Vishay Siliconix
Document Number: 70254
S-04031—Rev. D, 04-Jun-01
www.vishay.com
8-1
Matched N-Channel JFET Pairs
Part Number
V
GS(off)
(V)
V
(BR)GSS
Min (V)
g
fs
Min (mS)
I
G
Typ (pA)
V
GS1
– V
GS2
Max (mV)
2N5564
–0.5 to –3
–40
7.5
–3
5
2N5565
–0.5 to –3
–40
7.5
–3
10
2N5566
–0.5 to –3
–40
7.5
–3
20
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 3 pA
Low Noise: 12
nV
√
Hz
@ 10 Hz
Good CMRR: 76 dB
Minimum Parasitics
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time
Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
Maximum High Frequency Performance
Wideband Differential Amps
High-Speed,
Temp-Compensated,
Single-Ended Input Amps
High-Speed Comparators
Impedance Converters
Matched Switches
The 2N5564/5565/5566 are matched pairs of JFETs mounted
in a TO-71 package. This two-chip design reduces parasitics
for good performance at high frequency while ensuring
extremely tight matching. This series features high
breakdown voltage (V
(BR)DSS
typically > 55 V), high gain
(typically > 9 mS), and <5 mV offset between the two die.
The hermetically-sealed TO-71 package is available with full
military processing (see Military Information).
For similar products see the low-noise U/SST401 series, and
the low-leakage 2N5196/5197/5198/5199 data sheets.
TO-71
Top View
G
1
S
1
D
1
G
2
D
2
S
2
1
2
3
6
5
4
Gate-Drain, Gate-Source Voltage
Gate-Gate Voltage
Gate Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (
1
/
16
” from case for 10 sec.)
Storage Temperature
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–40 V
80 V
50 mA
300 C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
–65 to 200 C
Operating Junction Temperature
Power Dissipation :
–55 to 150 C
325 mW
650 mW
. . . . . . . . . . . . . . . . . . . . . . . . . .
Per Side
a
. . . . . . . . . . . . . . . . . . . . . . . .
Total
b
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a.
b.
Derate 2.6 mW/ C above 25 C
Derate 5.2 mW/ C above 25 C
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PDF描述 |
|---|---|
| 2N5566 | Matched N-Channel JFET Pairs |
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| 2N5477 | TRANSISTOR | BJT | NPN | 80V V(BR)CEO | 7A I(C) | TO-210AA |
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 2N5565-2 | 制造商:Vishay Siliconix 功能描述:TRANS JFET N-CH 6PIN TO-71 - Bulk |
| 2N5565-E3 | 功能描述:JFET 40V 5mA RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流（Vgs=0 時的 Idss）:50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續(xù)電流:50 mA 配置: 安裝風格: 封裝 / 箱體:SC-59 封裝:Reel |
| 2N5566 | 功能描述:JFET 40V 5mA RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流（Vgs=0 時的 Idss）:50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續(xù)電流:50 mA 配置: 安裝風格: 封裝 / 箱體:SC-59 封裝:Reel |
| 2N5566-2 | 制造商:Vishay Siliconix 功能描述:TRANS JFET N-CH 6PIN TO-71 - Bulk |
| 2N5566-E3 | 功能描述:JFET 40V 5mA RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流（Vgs=0 時的 Idss）:50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續(xù)電流:50 mA 配置: 安裝風格: 封裝 / 箱體:SC-59 封裝:Reel |
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