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參數(shù)資料
| 型號： | 29F102BB |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1 Mbit 64Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 1兆位64Kb的x16插槽，啟動座單電源閃存 |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 432K |
| 代理商： | 29F102BB |
M29F102BB
10/24
Table 4. Commands
Note: 1. X Don’t Care, PA Program Address, PD Program Data, BA Any address in the Block.
2. All values in the table are in hexadecimal.
3. The Command Interface only uses address bits A0-A10 and DQ0-DQ7 to verify the commands, the upper address bits and the
upper data bits are Don’t Care.
4. Read/Reset.
5. After a Read/Reset command, read the memory as normal until another command is issued.
6. Auto Select.
7. After an Auto Select command, read Manufacturer ID, Device ID or Block Protection Status.
8. Program, Unlock Bypass Program, Chip Erase, Block Erase.
9. After these commands read the Status Register until the Program/Erase Controller completes and the memory returns to Read
Mode. Add additional Blocks during Block Erase Command with additional Bus Write Operations until the Timeout Bit is set.
10. Unlock Bypass.
11. After the Unlock Bypass command issue Unlock Bypass Program or Unlock Bypass Reset commands.
12. Unlock Bypass Reset.
13. After the Unlock Bypass Reset command read the memory as normal until another command is issued.
14. Erase Suspend.
15. After the Erase Suspend command read non-erasing memory blocks as normal, issue Auto Select and Program commands on non-
erasing blocks as normal.
16. Erase Resume.
17. After the Erase Resume command the suspended Erase operation resumes, read the Status Register until the Program/Erase Con-
troller completes and the memory returns to Read Mode.
Table 5. Program, Erase Times and Program, Erase Endurance Cycles (T
A
= 0 to 70°C
)
Note: 1. T
A
= 25°C, V
CC
= 5V.
Command
L
Bus Write Operations
1st
2nd
3rd
4th
5th
6th
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/Reset
1
X
F0
3
555
AA
2AA
55
X
F0
Auto Select
3
555
AA
2AA
55
555
90
Program
4
555
AA
2AA
55
555
A0
PA
PD
Unlock Bypass
3
555
AA
2AA
55
555
20
Unlock Bypass
Program
2
X
A0
PA
PD
Unlock Bypass Reset
2
X
90
X
00
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Block Erase
6+
555
AA
2AA
55
555
80
555
AA
2AA
55
BA
30
Erase Suspend
1
X
B0
Erase Resume
1
X
30
Parameter
Min
Typ
(1)
Typical after
100k W/E Cycles
(1)
Max
Unit
Chip Erase (All bits in the memory set to ‘0’)
0.6
0.6
s
Chip Erase
1.3
1.3
6
s
Block Erase (32 KWords)
0.6
0.6
4
s
Program
8
8
150
μs
Chip Program
0.6
0.6
2.5
s
Program/Erase Cycles (per Block)
100,000
cycles
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