- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368957 > 28F160F3 (Intel Corp.) 16MBIT Fast Boot Block Flash Memory(16兆位的快速引導(dǎo)塊閃速存儲器) PDF資料下載
參數(shù)資料
| 型號： | 28F160F3 |
| 廠商： | Intel Corp. |
| 英文描述： | 16MBIT Fast Boot Block Flash Memory(16兆位的快速引導(dǎo)塊閃速存儲器) |
| 中文描述： | 16兆快速啟動塊快閃記憶體（16兆位的快速引導(dǎo)塊閃速存儲器） |
| 文件頁數(shù)： | 13/47頁 |
| 文件大?。?/td> | 277K |
| 代理商： | 28F160F3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
E
3.1.5
FAST BOOT BLOCK DATASHEET
13
PRODUCT PREVIEW
RESET
The device enters a reset mode when RST# is
driven low. In reset mode, internal circuitry is turned
off and outputs are placed in a high-impedance
state.
After return from reset, a time t
PHQV
is required until
outputs are valid, and a delay (t
PHWL
or t
PHEL
) is
required before a write sequence can be initiated.
After this wake-up interval, normal operation is
restored. The device defaults to read array mode,
the status register is set to 80H, and the read
configuration register defaults to asynchronous
page-mode reads.
If RP# is taken low during a block erase or program
operation, the operation will be aborted and the
memory contents at the aborted location are no
longer valid. See Figure 21 for detailed information
regarding reset timings.
4.0
COMMAND DEFINITIONS
Device operations are selected by writing specific
commands into the CUI. Table 3 defines these
commands.
Table 2. Bus Operations
Mode
Notes
RST#
CE#
ADV#
OE#
WE#
Address
V
PP
DQ
0
–15
Reset
V
IL
V
IH
V
IH
V
IH
V
IH
X
X
X
X
X
X
High Z
Standby
V
IH
V
IL
V
IL
V
IL
X
X
X
X
X
High Z
Output Disable
X
V
IH
V
IL
V
IL
V
IH
V
IH
V
IH
X
X
High Z
Read
1,2
V
IL
V
IL
X
X
D
OUT
See
Table 4
Read Identifier
Codes
See
Table 4
X
Write
3,4
V
IH
V
IL
V
IL
V
IH
V
IL
X
X
D
IN
NOTES:
1.
2.
Refer to DC Characteristics When V
PP
≤
V
PPLK
, memory contents can be read, but not altered.
X can be V
or V
IH
for control and address input pins and V
PPLK
or V
PPH1/2
for V
PP
. See DC Characteristicsfor V
PPLK
and
V
PPH1/2
voltages.
Command writes involving block erase or program are reliably executed when V
PP
= V
PPH1/2
and V
CC
= V
CC1/2
(see Section 8 for operating conditions at different temperatures).
Refer to Table 3 for valid D
IN
during a write operation.
3.
4.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F2001BX-T | 5V/3.3V or Adjustable, Low-Dropout, Low-IQ, 500mA Linear Regulators |
| 28F256 | FASTENERS, TIES CABLE |
| 28F256 | 256 Kilobit (32 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory |
| 28F320S3 | WORD-WIDE FlashFile MEMORY FAMILY |
| 28F320S5 | WORD-WIDE FlashFile MEMORY FAMILY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F160F3B95 | 制造商:Intel 功能描述: |
| 28F160S3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| 28F160S3HTL10A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F160S3HT-L10A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F160S3HT-L75A | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。